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Diffstat (limited to 'tests/sva/basic02.sv')
| -rw-r--r-- | tests/sva/basic02.sv | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tests/sva/basic02.sv b/tests/sva/basic02.sv index cf2d72ae7..b34f3aff3 100644 --- a/tests/sva/basic02.sv +++ b/tests/sva/basic02.sv @@ -10,7 +10,11 @@ endmodule module top_properties (input logic clock, read, write, ready); a_rw: assert property ( @(posedge clock) !(read && write) ); +`ifdef FAIL a_wr: assert property ( @(posedge clock) write |-> ready ); +`else + a_wr: assert property ( @(posedge clock) write |=> ready ); +`endif endmodule bind top top_properties properties_inst (.*); |