diff options
Diffstat (limited to 'tests/proc/proc_rom.ys')
| -rw-r--r-- | tests/proc/proc_rom.ys | 146 |
1 files changed, 146 insertions, 0 deletions
diff --git a/tests/proc/proc_rom.ys b/tests/proc/proc_rom.ys index c854e732f..0ef2e2c61 100644 --- a/tests/proc/proc_rom.ys +++ b/tests/proc/proc_rom.ys @@ -33,6 +33,7 @@ hierarchy -auto-top design -save orig proc +select -assert-count 1 t:$memrd_v2 memory opt_dff design -stash postopt @@ -41,3 +42,148 @@ proc -norom design -stash preopt equiv_opt -assert -run prepare: dummy + + + +design -reset + +read_verilog << EOT + +module top(input [3:0] a, input en, output [7:0] d); + +always @* + if (en) + case(a) + 4'h0: d <= 8'h12; + 4'h1: d <= 8'h34; + 4'h2: d <= 8'h56; + 4'h3: d <= 8'h78; + 4'h4: d <= 8'h9a; + 4'h5: d <= 8'hbc; + 4'h6: d <= 8'hde; + 4'h7: d <= 8'hff; + 4'h8: d <= 8'h61; + 4'h9: d <= 8'h49; + 4'ha: d <= 8'h36; + 4'hb: d <= 8'h81; + 4'hc: d <= 8'h8c; + default: d <= 8'h11; + endcase + else + d <= 0; + +endmodule + +EOT + +hierarchy -auto-top + +design -save orig +proc +select -assert-count 1 t:$memrd_v2 +memory +opt_dff +design -stash postopt +design -load orig +proc -norom +design -stash preopt + +equiv_opt -assert -run prepare: dummy + + + +design -reset + +read_verilog << EOT + +module top(input [31:0] a, input en, output [7:0] d); + +always @* + if (en) + case(a) + 0: d <= 8'h12; + 1: d <= 8'h34; + 2: d <= 8'h56; + 3: d <= 8'h78; + 4: d <= 8'h9a; + 5: d <= 8'hbc; + 6: d <= 8'hde; + 7: d <= 8'hff; + 8: d <= 8'h61; + 9: d <= 8'h49; + 10: d <= 8'h36; + 11: d <= 8'h81; + 12: d <= 8'h8c; + default: d <= 8'h11; + endcase + else + d <= 0; + +endmodule + +EOT + +hierarchy -auto-top + +design -save orig +proc +select -assert-count 1 t:$memrd_v2 +memory +opt_dff +design -stash postopt +design -load orig +proc -norom +design -stash preopt + +equiv_opt -assert -run prepare: dummy + + +design -reset + +read_verilog << EOT + +module top(input [3:0] a, input en, output [7:0] d); + +always @* + if (en) + case(a) + 'h0: d <= 8'h12; + 'h1: d <= 8'h34; + 'h2: d <= 8'h56; + 'h3: d <= 8'h78; + 'h4: d <= 8'h9a; + 'h5: d <= 8'hbc; + 'h6: d <= 8'hde; + 'h7: d <= 8'hff; + 'h8: d <= 8'h61; + 'h9: d <= 8'h49; + 'ha: d <= 8'h36; + 'hb: d <= 8'h81; + 'hc: d <= 8'h8c; + 'hd: d <= 8'ha9; + 'he: d <= 8'h99; + 'hf: d <= 8'h51; + endcase + else + d <= 0; + +endmodule + +EOT + +hierarchy -auto-top + +design -save orig +proc +select -assert-count 1 t:$memrd_v2 +memory +opt_dff +design -stash postopt +design -load orig +proc -norom +design -stash preopt + +equiv_opt -assert -run prepare: dummy + + + |