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Diffstat (limited to 'tests/ecp5/mul.ys')
| -rw-r--r-- | tests/ecp5/mul.ys | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/tests/ecp5/mul.ys b/tests/ecp5/mul.ys new file mode 100644 index 000000000..0a91f892e --- /dev/null +++ b/tests/ecp5/mul.ys @@ -0,0 +1,11 @@ +read_verilog mul.v +hierarchy -top top +proc +# Blocked by issue #1358 (Missing ECP5 simulation models) +#equiv_opt -assert -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check +equiv_opt -map +/ecp5/cells_sim.v synth_ecp5 # equivalency check + +design -load postopt # load the post-opt design (otherwise equiv_opt loads the pre-opt design) +cd top # Constrain all select calls below inside the top module +select -assert-count 1 t:MULT18X18D +select -assert-none t:MULT18X18D %% t:* %D |