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Diffstat (limited to 'tests/arch/xilinx/xilinx_dsp.ys')
| -rw-r--r-- | tests/arch/xilinx/xilinx_dsp.ys | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/tests/arch/xilinx/xilinx_dsp.ys b/tests/arch/xilinx/xilinx_dsp.ys index 3b9f52930..59d8296ab 100644 --- a/tests/arch/xilinx/xilinx_dsp.ys +++ b/tests/arch/xilinx/xilinx_dsp.ys @@ -8,4 +8,5 @@ assign o4 = a * b; DSP48E1 m3 (.A(a), .B(b), .P(o5)); endmodule EOT +read_verilog -lib +/xilinx/cells_sim.v xilinx_dsp |