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Diffstat (limited to 'tests/arch/common/blockrom.v')
| -rw-r--r-- | tests/arch/common/blockrom.v | 10 |
1 files changed, 5 insertions, 5 deletions
diff --git a/tests/arch/common/blockrom.v b/tests/arch/common/blockrom.v index 6f6c9d946..93f5c9ddf 100644 --- a/tests/arch/common/blockrom.v +++ b/tests/arch/common/blockrom.v @@ -10,16 +10,16 @@ module sync_rom #(parameter DATA_WIDTH=8, ADDRESS_WIDTH=10) reg [WORD:0] data_out_r; reg [WORD:0] memory [0:DEPTH]; - integer i,j = 16'hACE1; + integer i,j = 64'hF4B1CA8127865242; initial for (i = 0; i <= DEPTH; i++) begin // In case this ROM will be implemented in fabric: fill the memory with some data // uncorrelated with the address, or Yosys might see through the ruse and e.g. not // emit any LUTs at all for `memory[i] = i;`, just a latch. - memory[i] = j; - j = j ^ (j >> 7); - j = j ^ (j << 9); - j = j ^ (j >> 13); + memory[i] = j * 64'h2545F4914F6CDD1D; + j = j ^ (j >> 12); + j = j ^ (j << 25); + j = j ^ (j >> 27); end always @(posedge clk) begin |