diff options
Diffstat (limited to 'techlibs')
-rw-r--r-- | techlibs/greenpak4/cells_sim.v | 27 | ||||
-rw-r--r-- | techlibs/greenpak4/synth_greenpak4.cc | 2 |
2 files changed, 29 insertions, 0 deletions
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 3acea01d2..2727d9246 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -91,6 +91,33 @@ module GP_COUNT8(input CLK, input wire RST, output reg OUT); parameter CLKIN_DIVIDE = 1; //more complex hard IP blocks are not supported for simulation yet + + reg[7:0] count = COUNT_TO; + + //Combinatorially output whenever we wrap low + always @(*) begin + OUT <= (count == 8'h0); + end + + //POR or SYSRST reset value is COUNT_TO. Datasheet is unclear but conversations w/ Silego confirm. + //Runtime reset value is clearly 0 except in count/FSM cells where it's configurable but we leave at 0 for now. + //Datasheet seems to indicate that reset is asynchronous, but for now we model as sync due to Yosys issues... + always @(posedge CLK) begin + + count <= count - 1'd1; + + if(count == 0) + count <= COUNT_MAX; + + /* + if((RESET_MODE == "RISING") && RST) + count <= 0; + if((RESET_MODE == "FALLING") && !RST) + count <= 0; + if((RESET_MODE == "BOTH") && RST) + count <= 0; + */ + end endmodule diff --git a/techlibs/greenpak4/synth_greenpak4.cc b/techlibs/greenpak4/synth_greenpak4.cc index 04166d8be..872ad5a2c 100644 --- a/techlibs/greenpak4/synth_greenpak4.cc +++ b/techlibs/greenpak4/synth_greenpak4.cc @@ -108,6 +108,7 @@ struct SynthGreenPAK4Pass : public Pass { log(" check -noinit\n"); log("\n"); log(" json:\n"); + log(" splitnets (temporary workaround for gp4par parser limitation)\n"); log(" write_json <file-name>\n"); log("\n"); } @@ -221,6 +222,7 @@ struct SynthGreenPAK4Pass : public Pass { if (check_label(active, run_from, run_to, "json")) { + Pass::call(design, "splitnets"); if (!json_file.empty()) Pass::call(design, stringf("write_json %s", json_file.c_str())); } |