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-rw-r--r--techlibs/common/simlib.v15
1 files changed, 11 insertions, 4 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index e64697efb..b5e437d90 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1331,10 +1331,17 @@ always @* begin
Y = A;
found_active_sel_bit = 0;
for (i = 0; i < S_WIDTH; i = i+1)
- if (S[i]) begin
- Y = found_active_sel_bit ? 'bx : B >> (WIDTH*i);
- found_active_sel_bit = 1;
- end
+ case (S[i])
+ 1'b1: begin
+ Y = found_active_sel_bit ? 'bx : B >> (WIDTH*i);
+ found_active_sel_bit = 1;
+ end
+ 1'b0: ;
+ 1'bx: begin
+ Y = 'bx;
+ found_active_sel_bit = 'bx;
+ end
+ endcase
end
endmodule