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Diffstat (limited to 'techlibs/xilinx/xc7_brams_map.v')
| -rw-r--r-- | techlibs/xilinx/xc7_brams_map.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/xilinx/xc7_brams_map.v b/techlibs/xilinx/xc7_brams_map.v index 7ea49158d..2b6ad0da6 100644 --- a/techlibs/xilinx/xc7_brams_map.v +++ b/techlibs/xilinx/xc7_brams_map.v @@ -1,3 +1,5 @@ +// Virtex 6 and Series 7 block RAM mapping. + module \$__XILINX_RAMB36_SDP (CLK2, CLK3, A1ADDR, A1DATA, A1EN, B1ADDR, B1DATA, B1EN); parameter CLKPOL2 = 1; parameter CLKPOL3 = 1; |