diff options
Diffstat (limited to 'techlibs/xilinx/tests/test_dsp_model.sh')
-rw-r--r-- | techlibs/xilinx/tests/test_dsp_model.sh | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/techlibs/xilinx/tests/test_dsp_model.sh b/techlibs/xilinx/tests/test_dsp_model.sh index 2acd97eb4..ae925c402 100644 --- a/techlibs/xilinx/tests/test_dsp_model.sh +++ b/techlibs/xilinx/tests/test_dsp_model.sh @@ -4,10 +4,10 @@ sed 's/DSP48E1/DSP48E1_UUT/; /DSP48E1_UUT/,/endmodule/ p; d;' < ../cells_sim.v > if [ ! -f "test_dsp_model_ref.v" ]; then cat /opt/Xilinx/Vivado/2019.1/data/verilog/src/unisims/DSP48E1.v > test_dsp_model_ref.v fi -for tb in simd24_preadd_noreg_nocasc simd12_preadd_noreg_nocasc \ +for tb in macc_overflow_underflow \ + simd24_preadd_noreg_nocasc simd12_preadd_noreg_nocasc \ mult_allreg_nopreadd_nocasc mult_noreg_nopreadd_nocasc \ - mult_allreg_preadd_nocasc mult_noreg_preadd_nocasc mult_inreg_preadd_nocasc \ - + mult_allreg_preadd_nocasc mult_noreg_preadd_nocasc mult_inreg_preadd_nocasc do iverilog -s $tb -s glbl -o test_dsp_model test_dsp_model.v test_dsp_model_uut.v test_dsp_model_ref.v /opt/Xilinx/Vivado/2019.1/data/verilog/src/glbl.v vvp -N ./test_dsp_model |