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-rw-r--r--techlibs/machxo2/cells_sim.v12
-rw-r--r--techlibs/machxo2/synth_machxo2.cc6
2 files changed, 17 insertions, 1 deletions
diff --git a/techlibs/machxo2/cells_sim.v b/techlibs/machxo2/cells_sim.v
index 76de39299..3dd41334e 100644
--- a/techlibs/machxo2/cells_sim.v
+++ b/techlibs/machxo2/cells_sim.v
@@ -188,3 +188,15 @@ module OSCH #(
output SEDSTDBY
);
endmodule
+
+// IO- "$__" cells for the iopadmap pass. These are temporary cells not meant
+// to be instantiated by the end user. They are required in this file for
+// attrmvcp to work.
+(* blackbox *)
+module \$__FACADE_OUTPAD (input I, output O); endmodule
+(* blackbox *)
+module \$__FACADE_INPAD (input I, output O); endmodule
+(* blackbox *)
+module \$__FACADE_TOUTPAD (input I, OE, output O); endmodule
+(* blackbox *)
+module \$__FACADE_TINOUTPAD (input I, OE, output O, inout B); endmodule
diff --git a/techlibs/machxo2/synth_machxo2.cc b/techlibs/machxo2/synth_machxo2.cc
index c9ab23426..ea9b2a0e8 100644
--- a/techlibs/machxo2/synth_machxo2.cc
+++ b/techlibs/machxo2/synth_machxo2.cc
@@ -154,7 +154,7 @@ struct SynthMachXO2Pass : public ScriptPass
{
if (check_label("begin"))
{
- run("read_verilog -lib +/machxo2/cells_sim.v");
+ run("read_verilog -lib -icells +/machxo2/cells_sim.v");
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
@@ -184,7 +184,11 @@ struct SynthMachXO2Pass : public ScriptPass
if (check_label("map_ios"))
{
if (!noiopad || help_mode)
+ {
run("iopadmap -bits -outpad $__FACADE_OUTPAD I:O -inpad $__FACADE_INPAD O:I -toutpad $__FACADE_TOUTPAD OE:I:O -tinoutpad $__FACADE_TINOUTPAD OE:O:I:B A:top", "(skip if '-noiopad')");
+ run("attrmvcp -attr src -attr LOC t:$__FACADE_OUTPAD %x:+[O] t:$__FACADE_TOUTPAD %x:+[O] t:$__FACADE_TINOUTPAD %x:+[B]", "(skip if '-noiopad')");
+ run("attrmvcp -attr src -attr LOC -driven t:$__FACADE_INPAD %x:+[I]", "(skip if '-noiopad')");
+ }
}
if (check_label("map_ffs"))