diff options
Diffstat (limited to 'techlibs/intel_alm/common')
-rw-r--r-- | techlibs/intel_alm/common/megafunction_bb.v | 35 | ||||
-rw-r--r-- | techlibs/intel_alm/common/misc_sim.v | 12 | ||||
-rw-r--r-- | techlibs/intel_alm/common/quartus_rename.v | 44 |
3 files changed, 91 insertions, 0 deletions
diff --git a/techlibs/intel_alm/common/megafunction_bb.v b/techlibs/intel_alm/common/megafunction_bb.v index 874f293b1..aabcd4539 100644 --- a/techlibs/intel_alm/common/megafunction_bb.v +++ b/techlibs/intel_alm/common/megafunction_bb.v @@ -627,3 +627,38 @@ output [port_b_data_width-1:0] portbdataout; input clk0, portawe, portbre; endmodule + +(* blackbox *) +module cyclone10gx_io_ibuf(i, ibar, dynamicterminationcontrol, o); + +parameter differential_mode ="false"; +parameter bus_hold = "false"; +parameter simulate_z_as = "Z"; +parameter lpm_type = "cyclone10gx_io_ibuf"; + +(* iopad_external_pin *) input i; +(* iopad_external_pin *) input ibar; +input dynamicterminationcontrol; +output o; + +endmodule + +(* blackbox *) +module cyclone10gx_io_obuf(i, oe, dynamicterminationcontrol, seriesterminationcontrol, parallelterminationcontrol, devoe, o, obar); + +parameter open_drain_output = "false"; +parameter bus_hold = "false"; +parameter shift_series_termination_control = "false"; +parameter sim_dynamic_termination_control_is_connected = "false"; +parameter lpm_type = "cyclone10gx_io_obuf"; + +input i; +input oe; +input devoe; +input dynamicterminationcontrol; +input [15:0] seriesterminationcontrol; +input [15:0] parallelterminationcontrol; +(* iopad_external_pin *) output o; +(* iopad_external_pin *) output obar; + +endmodule diff --git a/techlibs/intel_alm/common/misc_sim.v b/techlibs/intel_alm/common/misc_sim.v new file mode 100644 index 000000000..e9494a8ee --- /dev/null +++ b/techlibs/intel_alm/common/misc_sim.v @@ -0,0 +1,12 @@ +module MISTRAL_IB((* iopad_external_pin *) input PAD, output O); + assign O = PAD; +endmodule + +module MISTRAL_OB((* iopad_external_pin *) output PAD, input I); + assign PAD = I; +endmodule + +module MISTRAL_IO((* iopad_external_pin *) inout PAD, input I, input OE, output O); + assign PAD = OE ? I : 1'bz; + assign O = PAD; +endmodule diff --git a/techlibs/intel_alm/common/quartus_rename.v b/techlibs/intel_alm/common/quartus_rename.v index 3b4628675..964a094dd 100644 --- a/techlibs/intel_alm/common/quartus_rename.v +++ b/techlibs/intel_alm/common/quartus_rename.v @@ -2,11 +2,15 @@ `define LCELL cyclonev_lcell_comb `define MAC cyclonev_mac `define MLAB cyclonev_mlab_cell +`define IBUF cyclonev_io_ibuf +`define OBUF cyclonev_io_obuf `endif `ifdef cyclone10gx `define LCELL cyclone10gx_lcell_comb `define MAC cyclone10gx_mac `define MLAB cyclone10gx_mlab_cell +`define IBUF cyclone10gx_io_ibuf +`define OBUF cyclone10gx_io_obuf `endif module __MISTRAL_VCC(output Q); @@ -233,3 +237,43 @@ parameter B_SIGNED = 1; ); endmodule + +module MISTRAL_IB(input PAD, output O); +`IBUF #( + .bus_hold("false"), + .differential_mode("false") +) _TECHMAP_REPLACE_ ( + .i(PAD), + .o(O) +); +endmodule + +module MISTRAL_OB(output PAD, input I, OE); +`OBUF #( + .bus_hold("false"), + .differential_mode("false") +) _TECHMAP_REPLACE_ ( + .i(I), + .o(PAD), + .oe(OE) +); +endmodule + +module MISTRAL_IO(output PAD, input I, OE, output O); +`IBUF #( + .bus_hold("false"), + .differential_mode("false") +) ibuf ( + .i(PAD), + .o(O) +); + +`OBUF #( + .bus_hold("false"), + .differential_mode("false") +) obuf ( + .i(I), + .o(PAD), + .oe(OE) +); +endmodule |