1 files changed, 7 insertions, 1 deletions
diff --git a/techlibs/ice40/tests/test_bram.v b/techlibs/ice40/tests/test_bram.v
index d26df7572..a625b6b66 100644
--- a/techlibs/ice40/tests/test_bram.v
+++ b/techlibs/ice40/tests/test_bram.v
@@ -1,5 +1,6 @@
 module bram #(
-	parameter ABITS = 8, DBITS = 8
+	parameter ABITS = 8, DBITS = 8,
+	parameter INIT_ADDR = 0, INIT_DATA = 0
 ) (
 	input clk,
 
@@ -12,6 +13,11 @@ module bram #(
 );
 	reg [DBITS-1:0] memory [0:2**ABITS-1];
 
+	initial begin
+		if (INIT_ADDR || INIT_DATA)
+			memory[INIT_ADDR] <= INIT_DATA;
+	end
+
 	always @(posedge clk) begin
 		if (WR_EN) memory[WR_ADDR] <= WR_DATA;
 		RD_DATA <= memory[RD_ADDR];