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Diffstat (limited to 'techlibs/greenpak4')
| -rw-r--r-- | techlibs/greenpak4/cells_sim.v | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/techlibs/greenpak4/cells_sim.v b/techlibs/greenpak4/cells_sim.v index 04bce8771..7555a7ac8 100644 --- a/techlibs/greenpak4/cells_sim.v +++ b/techlibs/greenpak4/cells_sim.v @@ -17,6 +17,8 @@ module GP_ABUF(input wire IN, output wire OUT); assign OUT = IN; + //cannot simulate mixed signal IP + endmodule module GP_ACMP(input wire PWREN, input wire VIN, input wire VREF, output reg OUT); |