diff options
Diffstat (limited to 'techlibs/efinix/cells_sim.v')
| -rw-r--r-- | techlibs/efinix/cells_sim.v | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/techlibs/efinix/cells_sim.v b/techlibs/efinix/cells_sim.v index a74d1c571..22c7bc776 100644 --- a/techlibs/efinix/cells_sim.v +++ b/techlibs/efinix/cells_sim.v @@ -36,6 +36,7 @@ module EFX_FF( output reg Q, input D, input CE, + (* clkbuf_sink *) input CLK, input SR ); @@ -100,6 +101,7 @@ endmodule module EFX_GBUFCE( input CE, input I, + (* clkbuf_driver *) output O ); parameter CE_POLARITY = 1'b1; @@ -115,11 +117,13 @@ module EFX_RAM_5K( input [WRITE_WIDTH-1:0] WDATA, input [WRITE_ADDR_WIDTH-1:0] WADDR, input WE, + (* clkbuf_sink *) input WCLK, input WCLKE, output [READ_WIDTH-1:0] RDATA, input [READ_ADDR_WIDTH-1:0] RADDR, input RE, + (* clkbuf_sink *) input RCLK ); parameter READ_WIDTH = 20; @@ -172,4 +176,4 @@ module EFX_RAM_5K( (WRITE_WIDTH == 10) ? 9 : // 512x10 (WRITE_WIDTH == 5) ? 10 : -1; // 1024x5 -endmodule
\ No newline at end of file +endmodule |