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-rw-r--r--techlibs/common/simlib.v7
1 files changed, 4 insertions, 3 deletions
diff --git a/techlibs/common/simlib.v b/techlibs/common/simlib.v
index facecd9a4..965242cdc 100644
--- a/techlibs/common/simlib.v
+++ b/techlibs/common/simlib.v
@@ -1419,6 +1419,10 @@ endmodule
module \$specrule (EN_SRC, EN_DST, SRC, DST);
+parameter SKEW = 0;
+parameter HOLD = 0;
+parameter T_LIMIT = 0;
+
parameter SRC_WIDTH = 1;
parameter DST_WIDTH = 1;
@@ -1428,9 +1432,6 @@ parameter SRC_POL = 0;
parameter DST_PEN = 0;
parameter DST_POL = 0;
-parameter LIMIT_GT = 0;
-parameter T_LIMIT = 0;
-
input EN_SRC, EN_DST;
input [SRC_WIDTH-1:0] SRC;
input [DST_WIDTH-1:0] DST;