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-rw-r--r--passes/sat/sim.cc5
1 files changed, 4 insertions, 1 deletions
diff --git a/passes/sat/sim.cc b/passes/sat/sim.cc
index ff815b69a..05fe11201 100644
--- a/passes/sat/sim.cc
+++ b/passes/sat/sim.cc
@@ -1033,7 +1033,9 @@ struct SimWorker : SimShared
log_error("No clock edges found in given time range\n");
fst->reconstructAllAtTimes(edges);
bool initial = false;
+ int cycle = 0;
for(auto &time : edges) {
+ log("Simulating cycle %d [%zu %s].\n", cycle+1, time, fst->getTimescaleString());
for(auto &item : inputs) {
std::string v = fst->valueAt(item.second, time);
top->set_state(item.first, Const::from_string(v));
@@ -1046,7 +1048,8 @@ struct SimWorker : SimShared
bool status = top->checkSignals(time);
if (status)
- log_error("Signal difference at %zu\n", time);
+ log_error("Signal difference\n");
+ cycle++;
}
}
}