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-rw-r--r--passes/proc/proc_dff.cc4
-rw-r--r--passes/proc/proc_init.cc2
2 files changed, 0 insertions, 6 deletions
diff --git a/passes/proc/proc_dff.cc b/passes/proc/proc_dff.cc
index 8e5fbe8f4..a8aba903a 100644
--- a/passes/proc/proc_dff.cc
+++ b/passes/proc/proc_dff.cc
@@ -352,10 +352,6 @@ static void proc_dff(RTLIL::Module *mod, RTLIL::Process *proc, ConstEval &ce)
ce.assign_map.apply(rstval);
ce.assign_map.apply(sig);
- insig.optimize();
- rstval.optimize();
- sig.optimize();
-
if (rstval == sig) {
rstval = RTLIL::SigSpec(RTLIL::State::Sz, sig.size());
sync_level = NULL;
diff --git a/passes/proc/proc_init.cc b/passes/proc/proc_init.cc
index ba1fb5ab9..4c9b6bcd2 100644
--- a/passes/proc/proc_init.cc
+++ b/passes/proc/proc_init.cc
@@ -28,7 +28,6 @@ static void proc_get_const(RTLIL::SigSpec &sig, RTLIL::CaseRule &rule)
assert(rule.compare.size() == 0);
while (1) {
- sig.optimize();
RTLIL::SigSpec tmp = sig;
for (auto &it : rule.actions)
tmp.replace(it.first, it.second);
@@ -53,7 +52,6 @@ static void proc_init(RTLIL::Module *mod, RTLIL::Process *proc)
RTLIL::SigSpec lhs = action.first;
RTLIL::SigSpec rhs = action.second;
- lhs.optimize();
proc_get_const(rhs, proc->root_case);
if (!rhs.is_fully_const())