diff options
Diffstat (limited to 'passes/memory/memory_nordff.cc')
| -rw-r--r-- | passes/memory/memory_nordff.cc | 25 |
1 files changed, 16 insertions, 9 deletions
diff --git a/passes/memory/memory_nordff.cc b/passes/memory/memory_nordff.cc index a4fdcfc38..3253c8f60 100644 --- a/passes/memory/memory_nordff.cc +++ b/passes/memory/memory_nordff.cc @@ -1,7 +1,7 @@ /* * yosys -- Yosys Open SYnthesis Suite * - * Copyright (C) 2012 Clifford Wolf <clifford@clifford.at> + * Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -33,7 +33,7 @@ struct MemoryNordffPass : public Pass { log(" memory_nordff [options] [selection]\n"); log("\n"); log("This pass extracts FFs from memory read ports. This results in a netlist\n"); - log("similar to what one would get from calling memory_dff with -nordff.\n"); + log("similar to what one would get from not calling memory_dff.\n"); log("\n"); } void execute(std::vector<std::string> args, RTLIL::Design *design) override @@ -51,15 +51,22 @@ struct MemoryNordffPass : public Pass { extra_args(args, argidx, design); for (auto module : design->selected_modules()) - for (auto &mem : Mem::get_selected_memories(module)) { - bool changed = false; - for (int i = 0; i < GetSize(mem.rd_ports); i++) - if (mem.extract_rdff(i)) - changed = true; + SigMap sigmap(module); + FfInitVals initvals(&sigmap, module); + for (auto &mem : Mem::get_selected_memories(module)) + { + bool changed = false; + for (int i = 0; i < GetSize(mem.rd_ports); i++) { + if (mem.rd_ports[i].clk_enable) { + mem.extract_rdff(i, &initvals); + changed = true; + } + } - if (changed) - mem.emit(); + if (changed) + mem.emit(); + } } } } MemoryNordffPass; |