diff options
Diffstat (limited to 'manual/FILES_Eval')
-rw-r--r-- | manual/FILES_Eval/grep-it.sh | 84 | ||||
-rw-r--r-- | manual/FILES_Eval/openmsp430.prj | 14 | ||||
-rw-r--r-- | manual/FILES_Eval/openmsp430_ys.prj | 1 | ||||
-rw-r--r-- | manual/FILES_Eval/or1200.prj | 37 | ||||
-rw-r--r-- | manual/FILES_Eval/or1200_ys.prj | 1 | ||||
-rw-r--r-- | manual/FILES_Eval/run-it.sh | 74 | ||||
-rw-r--r-- | manual/FILES_Eval/settings.xst | 2 |
7 files changed, 213 insertions, 0 deletions
diff --git a/manual/FILES_Eval/grep-it.sh b/manual/FILES_Eval/grep-it.sh new file mode 100644 index 000000000..f92eb52cf --- /dev/null +++ b/manual/FILES_Eval/grep-it.sh @@ -0,0 +1,84 @@ +#!/bin/bash + +openmsp430_mods=" +omsp_alu +omsp_clock_module +omsp_dbg +omsp_dbg_uart +omsp_execution_unit +omsp_frontend +omsp_mem_backbone +omsp_multiplier +omsp_register_file +omsp_sfr +omsp_sync_cell +omsp_sync_reset +omsp_watchdog +openMSP430" + +or1200_mods=" +or1200_alu +or1200_amultp2_32x32 +or1200_cfgr +or1200_ctrl +or1200_dc_top +or1200_dmmu_tlb +or1200_dmmu_top +or1200_du +or1200_except +or1200_fpu +or1200_freeze +or1200_ic_fsm +or1200_ic_ram +or1200_ic_tag +or1200_ic_top +or1200_if +or1200_immu_tlb +or1200_lsu +or1200_mem2reg +or1200_mult_mac +or1200_operandmuxes +or1200_pic +or1200_pm +or1200_qmem_top +or1200_reg2mem +or1200_rf +or1200_sb +or1200_sprs +or1200_top +or1200_tt +or1200_wbmux" + +grep_regs() { + x=$(grep '^ Number of Slice Registers:' $1.syr | sed 's/.*: *//;' | cut -f1 -d' ') + echo $x | sed 's,^ *$,-1,' +} + +grep_luts() { + x=$(grep '^ Number of Slice LUTs:' $1.syr | sed 's/.*: *//;' | cut -f1 -d' ') + echo $x | sed 's,^ *$,-1,' +} + +grep_freq() { + x=$(grep 'Minimum period.*Maximum Frequency' $1.syr | sed 's/\.[0-9]*MHz.*//;' | cut -f3 -d:) + echo $x | sed 's,^ *$,-1,' +} + +for mod in $openmsp430_mods $or1200_mods; do + printf '%-30s s,$, \\& %6d \\& %6d \\& %4d MHz \\& %6d \\& %6d \\& %4d MHz \\\\\\\\,;\n' "/${mod//_/\\\\_}}/" \ + $(grep_regs ${mod}) $(grep_luts ${mod}) $(grep_freq ${mod}) \ + $(grep_regs ${mod}_ys) $(grep_luts ${mod}_ys) $(grep_freq ${mod}_ys) +done + +# for mod in $openmsp430_mods $or1200_mods; do +# [ $mod = "or1200_top" -o $mod = "or1200_dmmu_top" -o $mod = or1200_dmmu_tlb -o $mod = or1200_immu_tlb ] && continue +# regs=$(grep_regs ${mod}) regs_ys=$(grep_regs ${mod}_ys) +# luts=$(grep_luts ${mod}) luts_ys=$(grep_luts ${mod}_ys) +# freq=$(grep_freq ${mod}) freq_ys=$(grep_freq ${mod}_ys) +# if [ $regs -gt 0 -a $regs_ys -gt 0 ]; then regs_p=$(( 100*regs_ys / regs )); else regs_p=NaN; fi +# if [ $luts -gt 0 -a $luts_ys -gt 0 ]; then luts_p=$(( 100*luts_ys / luts )); else luts_p=NaN; fi +# if [ $freq -gt 0 -a $freq_ys -gt 0 ]; then freq_p=$(( 100*freq_ys / freq )); else freq_p=NaN; fi +# printf '%-30s %3s %3s %3s\n' $mod $regs_p $luts_p $freq_p +# +# done + diff --git a/manual/FILES_Eval/openmsp430.prj b/manual/FILES_Eval/openmsp430.prj new file mode 100644 index 000000000..cb8cd2714 --- /dev/null +++ b/manual/FILES_Eval/openmsp430.prj @@ -0,0 +1,14 @@ +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_cell.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sync_reset.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_register_file.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg_uart.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_alu.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_watchdog.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_sfr.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_multiplier.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_mem_backbone.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_frontend.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_execution_unit.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_dbg.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/omsp_clock_module.v" +verilog work "../../../../../Work/yosys-tests/openmsp430/rtl/openMSP430.v" diff --git a/manual/FILES_Eval/openmsp430_ys.prj b/manual/FILES_Eval/openmsp430_ys.prj new file mode 100644 index 000000000..0009c99dc --- /dev/null +++ b/manual/FILES_Eval/openmsp430_ys.prj @@ -0,0 +1 @@ +verilog work "openmsp430_ys.v" diff --git a/manual/FILES_Eval/or1200.prj b/manual/FILES_Eval/or1200.prj new file mode 100644 index 000000000..9496874e0 --- /dev/null +++ b/manual/FILES_Eval/or1200.prj @@ -0,0 +1,37 @@ +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_spram.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_reg2mem.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_mem2reg.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_dpram.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_amultp2_32x32.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_wbmux.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_sprs.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_rf.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_operandmuxes.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_mult_mac.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_lsu.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_immu_tlb.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_if.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_ic_tag.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_ic_ram.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_ic_fsm.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_genpc.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_freeze.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_fpu.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_except.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_dmmu_tlb.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_ctrl.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_cfgr.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_alu.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_wb_biu.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_tt.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_sb.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_qmem_top.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_pm.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_pic.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_immu_top.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_ic_top.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_du.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_dmmu_top.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_dc_top.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_cpu.v" +verilog work "../../../../../Work/yosys-tests/or1200/rtl/or1200_top.v" diff --git a/manual/FILES_Eval/or1200_ys.prj b/manual/FILES_Eval/or1200_ys.prj new file mode 100644 index 000000000..4dd5f41a0 --- /dev/null +++ b/manual/FILES_Eval/or1200_ys.prj @@ -0,0 +1 @@ +verilog work "or1200_ys.v" diff --git a/manual/FILES_Eval/run-it.sh b/manual/FILES_Eval/run-it.sh new file mode 100644 index 000000000..b4a67cebd --- /dev/null +++ b/manual/FILES_Eval/run-it.sh @@ -0,0 +1,74 @@ +#!/bin/bash + +openmsp430_mods=" +omsp_alu +omsp_clock_module +omsp_dbg +omsp_dbg_uart +omsp_execution_unit +omsp_frontend +omsp_mem_backbone +omsp_multiplier +omsp_register_file +omsp_sfr +omsp_sync_cell +omsp_sync_reset +omsp_watchdog +openMSP430" + +or1200_mods=" +or1200_alu +or1200_amultp2_32x32 +or1200_cfgr +or1200_ctrl +or1200_dc_top +or1200_dmmu_tlb +or1200_dmmu_top +or1200_du +or1200_except +or1200_fpu +or1200_freeze +or1200_ic_fsm +or1200_ic_ram +or1200_ic_tag +or1200_ic_top +or1200_if +or1200_immu_tlb +or1200_lsu +or1200_mem2reg +or1200_mult_mac +or1200_operandmuxes +or1200_pic +or1200_pm +or1200_qmem_top +or1200_reg2mem +or1200_rf +or1200_sb +or1200_sprs +or1200_top +or1200_tt +or1200_wbmux" + +yosys_cmds="hierarchy -check; proc; opt; fsm; opt; memory; opt; techmap; opt; abc; opt" + +yosys -p "$yosys_cmds" -o openmsp430_ys.v $( cut -f2 -d'"' openmsp430.prj ) +yosys -p "$yosys_cmds" -o or1200_ys.v $( cut -f2 -d'"' or1200.prj ) + +. /opt/Xilinx/14.5/ISE_DS/settings64.sh + +run_single() { + prj_file=$1 top_module=$2 out_file=$3 + sed "s/@prj_file@/$prj_file/g; s/@out_file@/$out_file/g; s/@top_module@/$top_module/g;" < settings.xst > ${out_file}.xst + xst -ifn ${out_file}.xst -ofn ${out_file}.syr +} + +for mod in $openmsp430_mods; do + run_single openmsp430.prj ${mod} ${mod} + run_single openmsp430_ys.prj ${mod} ${mod}_ys +done + +for mod in $or1200_mods; do + run_single or1200.prj ${mod} ${mod} + run_single or1200_ys.prj ${mod} ${mod}_ys +done + diff --git a/manual/FILES_Eval/settings.xst b/manual/FILES_Eval/settings.xst new file mode 100644 index 000000000..2f381d09d --- /dev/null +++ b/manual/FILES_Eval/settings.xst @@ -0,0 +1,2 @@ +run -ifn @prj_file@ -ofn @out_file@ -ofmt NGC -top @top_module@ -p artix7 +-use_dsp48 NO -iobuf NO -ram_extract NO -rom_extract NO -fsm_extract YES -fsm_encoding Auto |