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-rw-r--r--manual/CHAPTER_StateOfTheArt/always01.v12
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diff --git a/manual/CHAPTER_StateOfTheArt/always01.v b/manual/CHAPTER_StateOfTheArt/always01.v
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index 4719ed47e..000000000
--- a/manual/CHAPTER_StateOfTheArt/always01.v
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@@ -1,12 +0,0 @@
-module uut_always01(clock, reset, c3, c2, c1, c0);
-
-input clock, reset;
-output c3, c2, c1, c0;
-reg [3:0] count;
-
-assign {c3, c2, c1, c0} = count;
-
-always @(posedge clock)
- count <= reset ? 0 : count + 1;
-
-endmodule