2 files changed, 2 insertions, 3 deletions
diff --git a/kernel/rtlil.cc b/kernel/rtlil.cc
index 9e09d9f04..9da6d2816 100644
--- a/kernel/rtlil.cc
+++ b/kernel/rtlil.cc
@@ -304,7 +304,7 @@ RTLIL::Design::~Design()
 {
 	for (auto it = modules_.begin(); it != modules_.end(); ++it)
 		delete it->second;
-	for (auto n : packages)
+	for (auto n : verilog_packages)
 		delete n;
 }
 
diff --git a/kernel/rtlil.h b/kernel/rtlil.h
index 275ba6820..274f97023 100644
--- a/kernel/rtlil.h
+++ b/kernel/rtlil.h
@@ -18,7 +18,6 @@
  */
 
 #include "kernel/yosys.h"
-#include "frontends/ast/ast.h"
 
 #ifndef RTLIL_H
 #define RTLIL_H
@@ -793,7 +792,7 @@ struct RTLIL::Design
 
 	int refcount_modules_;
 	dict<RTLIL::IdString, RTLIL::Module*> modules_;
-	std::vector<AST::AstNode*> packages;
+	std::vector<AST::AstNode*> verilog_packages;
 
 	std::vector<RTLIL::Selection> selection_stack;
 	dict<RTLIL::IdString, RTLIL::Selection> selection_vars;