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-rw-r--r--frontends/verilog/preproc.cc1
1 files changed, 1 insertions, 0 deletions
diff --git a/frontends/verilog/preproc.cc b/frontends/verilog/preproc.cc
index 9781a22d9..e33b0a2c3 100644
--- a/frontends/verilog/preproc.cc
+++ b/frontends/verilog/preproc.cc
@@ -961,6 +961,7 @@ frontend_verilog_preproc(std::istream &f,
}
if (tok == "`resetall") {
+ default_nettype_wire = true;
continue;
}