diff options
Diffstat (limited to 'frontends/verilog/verilog_parser.y')
| -rw-r--r-- | frontends/verilog/verilog_parser.y | 11 |
1 files changed, 1 insertions, 10 deletions
diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index dfdb11cf0..1c86c7895 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -1348,13 +1348,6 @@ param_real: astbuf1->children.push_back(new AstNode(AST_REALVALUE)); } -param_logic: - TOK_LOGIC { - // SV LRM 6.11, Table 6-8: logic -- 4-state, user-defined vector size, unsigned - astbuf1->is_signed = false; - astbuf1->is_logic = true; - } - param_range: range { if ($1 != NULL) { @@ -1366,10 +1359,8 @@ param_integer_type: param_integer param_signed param_range_type: type_vec param_signed param_range param_implicit_type: param_signed param_range -param_integer_vector_type: param_logic param_signed param_range - param_type: - param_integer_type | param_integer_vector_type | param_real | param_range_type | param_implicit_type | + param_integer_type | param_real | param_range_type | param_implicit_type | hierarchical_type_id { astbuf1->is_custom_type = true; astbuf1->children.push_back(new AstNode(AST_WIRETYPE)); |