diff options
Diffstat (limited to 'backends/btor')
| -rw-r--r-- | backends/btor/btor.cc | 31 | 
1 files changed, 22 insertions, 9 deletions
diff --git a/backends/btor/btor.cc b/backends/btor/btor.cc index 7de5deadd..06de71018 100644 --- a/backends/btor/btor.cc +++ b/backends/btor/btor.cc @@ -446,25 +446,28 @@ struct BtorWorker  			goto okay;  		} -		if (cell->type.in(ID($not), ID($neg), ID($_NOT_))) +		if (cell->type.in(ID($not), ID($neg), ID($_NOT_), ID($pos)))  		{  			string btor_op;  			if (cell->type.in(ID($not), ID($_NOT_))) btor_op = "not";  			if (cell->type == ID($neg)) btor_op = "neg"; -			log_assert(!btor_op.empty());  			int width = std::max(GetSize(cell->getPort(ID::A)), GetSize(cell->getPort(ID::Y)));  			bool a_signed = cell->hasParam(ID::A_SIGNED) ? cell->getParam(ID::A_SIGNED).as_bool() : false; - -			int sid = get_bv_sid(width);  			int nid_a = get_sig_nid(cell->getPort(ID::A), width, a_signed); - -			int nid = next_nid++; -			btorf("%d %s %d %d%s\n", nid, btor_op.c_str(), sid, nid_a, getinfo(cell).c_str()); -  			SigSpec sig = sigmap(cell->getPort(ID::Y)); +			// the $pos cell just passes through, all other cells need an actual operation applied +			int nid = nid_a; +			if (cell->type != ID($pos)) +			{ +				log_assert(!btor_op.empty()); +				int sid = get_bv_sid(width); +				nid = next_nid++; +				btorf("%d %s %d %d%s\n", nid, btor_op.c_str(), sid, nid_a, getinfo(cell).c_str()); +			} +  			if (GetSize(sig) < width) {  				int sid = get_bv_sid(GetSize(sig));  				int nid2 = next_nid++; @@ -609,7 +612,7 @@ struct BtorWorker  			goto okay;  		} -		if (cell->type.in(ID($dff), ID($ff), ID($_DFF_P_), ID($_DFF_N), ID($_FF_))) +		if (cell->type.in(ID($dff), ID($ff), ID($anyinit), ID($_DFF_P_), ID($_DFF_N), ID($_FF_)))  		{  			SigSpec sig_d = sigmap(cell->getPort(ID::D));  			SigSpec sig_q = sigmap(cell->getPort(ID::Q)); @@ -1109,6 +1112,16 @@ struct BtorWorker  			btorf("%d input %d%s\n", nid, sid, getinfo(wire).c_str());  			add_nid_sig(nid, sig); + +			if (!info_filename.empty()) { +				auto gclk_attr = wire->attributes.find(ID::replaced_by_gclk); +				if (gclk_attr != wire->attributes.end()) { +					if (gclk_attr->second == State::S1) +						info_clocks[nid] |= 1; +					else if (gclk_attr->second == State::S0) +						info_clocks[nid] |= 2; +				} +			}  		}  		btorf_pop("inputs");  | 
