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-rw-r--r--CHANGELOG8
1 files changed, 8 insertions, 0 deletions
diff --git a/CHANGELOG b/CHANGELOG
index 1fc139d49..481ba266e 100644
--- a/CHANGELOG
+++ b/CHANGELOG
@@ -50,7 +50,15 @@ Yosys 0.9 .. Yosys 0.9-dev
- "synth_ecp5" to now infer DSP blocks (-nodsp to disable, experimental)
- "synth_ice40 -dsp" to infer DSP blocks
- Added latch support to synth_xilinx
+ - Added support for flip-flops with synchronous reset to synth_xilinx
+ - Added support for flip-flops with reset and enable to synth_xilinx
- Added "check -mapped"
+ - Added checking of SystemVerilog always block types (always_comb,
+ always_latch and always_ff)
+ - Added "xilinx_dffopt" pass
+ - Added "scratchpad" pass
+ - Added "abc9 -dff"
+ - Added "synth_xilinx -dff"
Yosys 0.8 .. Yosys 0.9
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