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-rw-r--r--Makefile2
-rw-r--r--frontends/verific/README29
-rwxr-xr-xtechlibs/achronix/synth_achronix.cc4
-rw-r--r--techlibs/coolrunner2/synth_coolrunner2.cc2
-rw-r--r--techlibs/gowin/synth_gowin.cc14
-rw-r--r--techlibs/intel/synth_intel.cc4
6 files changed, 17 insertions, 38 deletions
diff --git a/Makefile b/Makefile
index 128539f6a..d83a71256 100644
--- a/Makefile
+++ b/Makefile
@@ -357,7 +357,7 @@ endif
endif
ifeq ($(ENABLE_VERIFIC),1)
-VERIFIC_DIR ?= /usr/local/src/verific_lib_eval
+VERIFIC_DIR ?= /usr/local/src/verific_lib
VERIFIC_COMPONENTS ?= verilog vhdl database util containers hier_tree
CXXFLAGS += $(patsubst %,-I$(VERIFIC_DIR)/%,$(VERIFIC_COMPONENTS)) -DYOSYS_ENABLE_VERIFIC
ifeq ($(OS), Darwin)
diff --git a/frontends/verific/README b/frontends/verific/README
index b4c436a3a..c76cdd637 100644
--- a/frontends/verific/README
+++ b/frontends/verific/README
@@ -4,35 +4,6 @@ This directory contains Verific bindings for Yosys.
See http://www.verific.com/ for details.
-Building Yosys with the 32 bit Verific eval library on amd64:
-=============================================================
-
-1.) Use a Makefile.conf like the following one:
-
---snip--
-CONFIG := gcc
-ENABLE_TCL := 0
-ENABLE_PLUGINS := 0
-ENABLE_VERIFIC := 1
-CXXFLAGS += -m32
-LDFLAGS += -m32
-VERIFIC_DIR = /usr/local/src/verific_lib_eval
---snap--
-
-
-2.) Install the necessary multilib packages
-
-Hint: On debian/ubuntu the multilib packages have names such as
-libreadline-dev:i386 or lib32readline6-dev, depending on the
-exact version of debian/ubuntu you are working with.
-
-
-3.) Build and test
-
-make -j8
-./yosys -p 'verific -sv frontends/verific/example.sv; verific -import top'
-
-
Verific Features that should be enabled in your Verific library
===============================================================
diff --git a/techlibs/achronix/synth_achronix.cc b/techlibs/achronix/synth_achronix.cc
index 3642e3bd3..626860d9c 100755
--- a/techlibs/achronix/synth_achronix.cc
+++ b/techlibs/achronix/synth_achronix.cc
@@ -95,8 +95,8 @@ struct SynthAchronixPass : public ScriptPass {
run_to = args[argidx].substr(pos+1);
continue;
}
- if (args[argidx] == "-flatten") {
- flatten = true;
+ if (args[argidx] == "-noflatten") {
+ flatten = false;
continue;
}
if (args[argidx] == "-retime") {
diff --git a/techlibs/coolrunner2/synth_coolrunner2.cc b/techlibs/coolrunner2/synth_coolrunner2.cc
index 810380d4a..21bbcaef4 100644
--- a/techlibs/coolrunner2/synth_coolrunner2.cc
+++ b/techlibs/coolrunner2/synth_coolrunner2.cc
@@ -129,7 +129,7 @@ struct SynthCoolrunner2Pass : public ScriptPass
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
- if (check_label("flatten", "(unless -noflatten)") && flatten)
+ if (flatten && check_label("flatten", "(unless -noflatten)"))
{
run("proc");
run("flatten");
diff --git a/techlibs/gowin/synth_gowin.cc b/techlibs/gowin/synth_gowin.cc
index 9700b3898..96128a680 100644
--- a/techlibs/gowin/synth_gowin.cc
+++ b/techlibs/gowin/synth_gowin.cc
@@ -52,6 +52,9 @@ struct SynthGowinPass : public ScriptPass
log(" -nobram\n");
log(" do not use BRAM cells in output netlist\n");
log("\n");
+ log(" -noflatten\n");
+ log(" do not flatten design before synthesis\n");
+ log("\n");
log(" -retime\n");
log(" run 'abc' with -dff option\n");
log("\n");
@@ -62,14 +65,15 @@ struct SynthGowinPass : public ScriptPass
}
string top_opt, vout_file;
- bool retime, nobram;
+ bool retime, flatten, nobram;
void clear_flags() YS_OVERRIDE
{
top_opt = "-auto-top";
vout_file = "";
retime = false;
- nobram = true;
+ flatten = true;
+ nobram = true;
}
void execute(std::vector<std::string> args, RTLIL::Design *design) YS_OVERRIDE
@@ -104,6 +108,10 @@ struct SynthGowinPass : public ScriptPass
nobram = true;
continue;
}
+ if (args[argidx] == "-noflatten") {
+ flatten = false;
+ continue;
+ }
break;
}
extra_args(args, argidx, design);
@@ -127,7 +135,7 @@ struct SynthGowinPass : public ScriptPass
run(stringf("hierarchy -check %s", help_mode ? "-top <top>" : top_opt.c_str()));
}
- if (check_label("flatten") && check_label("flatten", "(unless -noflatten)"))
+ if (flatten && check_label("flatten", "(unless -noflatten)"))
{
run("proc");
run("flatten");
diff --git a/techlibs/intel/synth_intel.cc b/techlibs/intel/synth_intel.cc
index d74f295ec..0f1d7a7b5 100644
--- a/techlibs/intel/synth_intel.cc
+++ b/techlibs/intel/synth_intel.cc
@@ -131,8 +131,8 @@ struct SynthIntelPass : public ScriptPass {
nobram = true;
continue;
}
- if (args[argidx] == "-flatten") {
- flatten = true;
+ if (args[argidx] == "-noflatten") {
+ flatten = false;
continue;
}
if (args[argidx] == "-retime") {