diff options
-rw-r--r-- | frontends/ast/genrtlil.cc | 2 | ||||
-rw-r--r-- | frontends/ast/simplify.cc | 24 | ||||
-rw-r--r-- | frontends/ilang/ilang_parser.y | 6 | ||||
-rw-r--r-- | frontends/verilog/verilog_frontend.cc | 2 | ||||
-rw-r--r-- | frontends/verilog/verilog_frontend.h | 2 | ||||
-rw-r--r-- | frontends/verilog/verilog_parser.y | 26 | ||||
-rw-r--r-- | kernel/constids.inc | 3 |
7 files changed, 34 insertions, 31 deletions
diff --git a/frontends/ast/genrtlil.cc b/frontends/ast/genrtlil.cc index 5894c7b3c..996762715 100644 --- a/frontends/ast/genrtlil.cc +++ b/frontends/ast/genrtlil.cc @@ -171,7 +171,7 @@ struct AST_INTERNAL::LookaheadRewriter for (auto c : node->id2ast->children) wire->children.push_back(c->clone()); wire->str = stringf("$lookahead%s$%d", node->str.c_str(), autoidx++); - wire->attributes["\\nosync"] = AstNode::mkconst_int(1, false); + wire->attributes[ID::nosync] = AstNode::mkconst_int(1, false); wire->is_logic = true; while (wire->simplify(true, false, false, 1, -1, false, false)) { } current_ast_mod->children.push_back(wire); diff --git a/frontends/ast/simplify.cc b/frontends/ast/simplify.cc index 837c14ad7..4f689fd1c 100644 --- a/frontends/ast/simplify.cc +++ b/frontends/ast/simplify.cc @@ -920,11 +920,11 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, range_swapped = templ->range_swapped; range_left = templ->range_left; range_right = templ->range_right; - attributes["\\wiretype"] = mkconst_str(resolved_type->str); + attributes[ID::wiretype] = mkconst_str(resolved_type->str); //check if enum - if (templ->attributes.count("\\enum_type")){ + if (templ->attributes.count(ID::enum_type)){ //get reference to enum node: - std::string enum_type = templ->attributes["\\enum_type"]->str.c_str(); + const std::string &enum_type = templ->attributes[ID::enum_type]->str; // log("enum_type=%s (count=%lu)\n", enum_type.c_str(), current_scope.count(enum_type)); // log("current scope:\n"); // for (auto &it : current_scope) @@ -972,7 +972,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, RTLIL::Const val = enum_item->children[0]->bitsAsConst(width, is_signed); enum_item_str.append(val.as_string()); //set attribute for available val to enum item name mappings - attributes[enum_item_str.c_str()] = mkconst_str(enum_item->str); + attributes[enum_item_str] = mkconst_str(enum_item->str); } } @@ -1021,7 +1021,7 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, range_swapped = templ->range_swapped; range_left = templ->range_left; range_right = templ->range_right; - attributes["\\wiretype"] = mkconst_str(resolved_type->str); + attributes[ID::wiretype] = mkconst_str(resolved_type->str); for (auto template_child : templ->children) children.push_back(template_child->clone()); did_something = true; @@ -1810,14 +1810,14 @@ bool AstNode::simplify(bool const_fold, bool at_zero, bool in_lvalue, int stage, AstNode *wire_mask = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(source_width-1, true), mkconst_int(0, true))); wire_mask->str = stringf("$bitselwrite$mask$%s:%d$%d", filename.c_str(), location.first_line, autoidx++); - wire_mask->attributes["\\nosync"] = AstNode::mkconst_int(1, false); + wire_mask->attributes[ID::nosync] = AstNode::mkconst_int(1, false); wire_mask->is_logic = true; while (wire_mask->simplify(true, false, false, 1, -1, false, false)) { } current_ast_mod->children.push_back(wire_mask); AstNode *wire_data = new AstNode(AST_WIRE, new AstNode(AST_RANGE, mkconst_int(source_width-1, true), mkconst_int(0, true))); wire_data->str = stringf("$bitselwrite$data$%s:%d$%d", filename.c_str(), location.first_line, autoidx++); - wire_data->attributes["\\nosync"] = AstNode::mkconst_int(1, false); + wire_data->attributes[ID::nosync] = AstNode::mkconst_int(1, false); wire_data->is_logic = true; while (wire_data->simplify(true, false, false, 1, -1, false, false)) { } current_ast_mod->children.push_back(wire_data); @@ -2637,7 +2637,7 @@ skip_dynamic_range_lvalue_expansion:; bool recommend_const_eval = false; bool require_const_eval = in_param ? false : has_const_only_constructs(recommend_const_eval); - if ((in_param || recommend_const_eval || require_const_eval) && !decl->attributes.count("\\via_celltype")) + if ((in_param || recommend_const_eval || require_const_eval) && !decl->attributes.count(ID::via_celltype)) { bool all_args_const = true; for (auto child : children) { @@ -2696,9 +2696,9 @@ skip_dynamic_range_lvalue_expansion:; goto replace_fcall_with_id; } - if (decl->attributes.count("\\via_celltype")) + if (decl->attributes.count(ID::via_celltype)) { - std::string celltype = decl->attributes.at("\\via_celltype")->asAttrConst().decode_string(); + std::string celltype = decl->attributes.at(ID::via_celltype)->asAttrConst().decode_string(); std::string outport = str; if (celltype.find(' ') != std::string::npos) { @@ -2792,7 +2792,7 @@ skip_dynamic_range_lvalue_expansion:; wire->is_reg = true; wire->attributes[ID::nosync] = AstNode::mkconst_int(1, false); if (child->type == AST_ENUM_ITEM) - wire->attributes["\\enum_base_type"] = child->attributes["\\enum_base_type"]; + wire->attributes[ID::enum_base_type] = child->attributes[ID::enum_base_type]; wire_cache[child->str] = wire; @@ -4092,7 +4092,7 @@ void AstNode::allocateDefaultEnumValues() int last_enum_int = -1; for (auto node : children) { log_assert(node->type==AST_ENUM_ITEM); - node->attributes["\\enum_base_type"] = mkconst_str(str); + node->attributes[ID::enum_base_type] = mkconst_str(str); for (size_t i = 0; i < node->children.size(); i++) { switch (node->children[i]->type) { case AST_NONE: diff --git a/frontends/ilang/ilang_parser.y b/frontends/ilang/ilang_parser.y index 8e21fb176..118f13de9 100644 --- a/frontends/ilang/ilang_parser.y +++ b/frontends/ilang/ilang_parser.y @@ -107,16 +107,16 @@ module: delete_current_module = false; if (current_design->has($2)) { RTLIL::Module *existing_mod = current_design->module($2); - if (!flag_overwrite && (flag_lib || (attrbuf.count("\\blackbox") && attrbuf.at("\\blackbox").as_bool()))) { + if (!flag_overwrite && (flag_lib || (attrbuf.count(ID::blackbox) && attrbuf.at(ID::blackbox).as_bool()))) { log("Ignoring blackbox re-definition of module %s.\n", $2); delete_current_module = true; - } else if (!flag_nooverwrite && !flag_overwrite && !existing_mod->get_bool_attribute("\\blackbox")) { + } else if (!flag_nooverwrite && !flag_overwrite && !existing_mod->get_bool_attribute(ID::blackbox)) { rtlil_frontend_ilang_yyerror(stringf("ilang error: redefinition of module %s.", $2).c_str()); } else if (flag_nooverwrite) { log("Ignoring re-definition of module %s.\n", $2); delete_current_module = true; } else { - log("Replacing existing%s module %s.\n", existing_mod->get_bool_attribute("\\blackbox") ? " blackbox" : "", $2); + log("Replacing existing%s module %s.\n", existing_mod->get_bool_attribute(ID::blackbox) ? " blackbox" : "", $2); current_design->remove(existing_mod); } } diff --git a/frontends/verilog/verilog_frontend.cc b/frontends/verilog/verilog_frontend.cc index 6879e0943..26abe49b5 100644 --- a/frontends/verilog/verilog_frontend.cc +++ b/frontends/verilog/verilog_frontend.cc @@ -48,7 +48,7 @@ static void error_on_dpi_function(AST::AstNode *node) error_on_dpi_function(child); } -static void add_package_types(std::map<std::string, AST::AstNode *> &user_types, std::vector<AST::AstNode *> &package_list) +static void add_package_types(dict<std::string, AST::AstNode *> &user_types, std::vector<AST::AstNode *> &package_list) { // prime the parser's user type lookup table with the package qualified names // of typedefed names in the packages seen so far. diff --git a/frontends/verilog/verilog_frontend.h b/frontends/verilog/verilog_frontend.h index 444cc7297..aa7881038 100644 --- a/frontends/verilog/verilog_frontend.h +++ b/frontends/verilog/verilog_frontend.h @@ -50,7 +50,7 @@ namespace VERILOG_FRONTEND extern std::vector<UserTypeMap *> user_type_stack; // names of package typedef'ed types - extern std::map<std::string, AST::AstNode*> pkg_user_types; + extern dict<std::string, AST::AstNode*> pkg_user_types; // state of `default_nettype extern bool default_nettype_wire; diff --git a/frontends/verilog/verilog_parser.y b/frontends/verilog/verilog_parser.y index 4a5aba79e..8da10df13 100644 --- a/frontends/verilog/verilog_parser.y +++ b/frontends/verilog/verilog_parser.y @@ -50,12 +50,12 @@ using namespace VERILOG_FRONTEND; YOSYS_NAMESPACE_BEGIN namespace VERILOG_FRONTEND { int port_counter; - std::map<std::string, int> port_stubs; - std::map<std::string, AstNode*> *attr_list, default_attr_list; - std::stack<std::map<std::string, AstNode*> *> attr_list_stack; - std::map<std::string, AstNode*> *albuf; + dict<std::string, int> port_stubs; + dict<IdString, AstNode*> *attr_list, default_attr_list; + std::stack<dict<IdString, AstNode*> *> attr_list_stack; + dict<IdString, AstNode*> *albuf; std::vector<UserTypeMap*> user_type_stack; - std::map<std::string, AstNode*> pkg_user_types; + dict<std::string, AstNode*> pkg_user_types; std::vector<AstNode*> ast_stack; struct AstNode *astbuf1, *astbuf2, *astbuf3; struct AstNode *current_function_or_task; @@ -87,7 +87,7 @@ YOSYS_NAMESPACE_END int frontend_verilog_yylex(YYSTYPE *yylval_param, YYLTYPE *yyloc_param); -static void append_attr(AstNode *ast, std::map<std::string, AstNode*> *al) +static void append_attr(AstNode *ast, dict<IdString, AstNode*> *al) { for (auto &it : *al) { if (ast->attributes.count(it.first) > 0) @@ -97,7 +97,7 @@ static void append_attr(AstNode *ast, std::map<std::string, AstNode*> *al) delete al; } -static void append_attr_clone(AstNode *ast, std::map<std::string, AstNode*> *al) +static void append_attr_clone(AstNode *ast, dict<IdString, AstNode*> *al) { for (auto &it : *al) { if (ast->attributes.count(it.first) > 0) @@ -106,7 +106,7 @@ static void append_attr_clone(AstNode *ast, std::map<std::string, AstNode*> *al) } } -static void free_attr(std::map<std::string, AstNode*> *al) +static void free_attr(dict<IdString, AstNode*> *al) { for (auto &it : *al) delete it.second; @@ -192,7 +192,7 @@ static void addRange(AstNode *parent, int msb = 31, int lsb = 0, bool isSigned = %union { std::string *string; struct YOSYS_NAMESPACE_PREFIX AST::AstNode *ast; - std::map<std::string, YOSYS_NAMESPACE_PREFIX AST::AstNode*> *al; + YOSYS_NAMESPACE_PREFIX dict<YOSYS_NAMESPACE_PREFIX RTLIL::IdString, YOSYS_NAMESPACE_PREFIX AST::AstNode*> *al; struct specify_target *specify_target_ptr; struct specify_triple *specify_triple_ptr; struct specify_rise_fall *specify_rise_fall_ptr; @@ -289,7 +289,7 @@ attr: { if (attr_list != nullptr) attr_list_stack.push(attr_list); - attr_list = new std::map<std::string, AstNode*>; + attr_list = new dict<IdString, AstNode*>; for (auto &it : default_attr_list) (*attr_list)[it.first] = it.second->clone(); } attr_opt { @@ -311,7 +311,7 @@ defattr: DEFATTR_BEGIN { if (attr_list != nullptr) attr_list_stack.push(attr_list); - attr_list = new std::map<std::string, AstNode*>; + attr_list = new dict<IdString, AstNode*>; for (auto &it : default_attr_list) delete it.second; default_attr_list.clear(); @@ -1388,7 +1388,7 @@ enum_type: TOK_ENUM { delete astbuf1; astbuf1 = tnode; tnode->type = AST_WIRE; - tnode->attributes["\\enum_type"] = AstNode::mkconst_str(astbuf2->str); + tnode->attributes[ID::enum_type] = AstNode::mkconst_str(astbuf2->str); // drop constant but keep any range delete tnode->children[0]; tnode->children.erase(tnode->children.begin()); } @@ -2341,7 +2341,7 @@ unique_case_attr: case_attr: attr unique_case_attr { - if ($2) (*$1)["\\parallel_case"] = AstNode::mkconst_int(1, false); + if ($2) (*$1)[ID::parallel_case] = AstNode::mkconst_int(1, false); $$ = $1; }; diff --git a/kernel/constids.inc b/kernel/constids.inc index 27b652e24..aa75a9c09 100644 --- a/kernel/constids.inc +++ b/kernel/constids.inc @@ -74,6 +74,8 @@ X(EN) X(EN_DST) X(EN_POLARITY) X(EN_SRC) +X(enum_base_type) +X(enum_type) X(equiv_merged) X(equiv_region) X(extract_order) @@ -196,6 +198,7 @@ X(U) X(unique) X(unused_bits) X(V) +X(via_celltype) X(wand) X(whitebox) X(WIDTH) |