aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
Diffstat
-rw-r--r--Makefile2
-rw-r--r--README.md8
-rw-r--r--manual/APPNOTE_010_Verilog_to_BLIF.tex2
-rw-r--r--manual/APPNOTE_011_Design_Investigation.tex2
-rw-r--r--manual/APPNOTE_012_Verilog_to_BTOR.tex2
-rw-r--r--manual/PRESENTATION_ExAdv.tex2
-rw-r--r--manual/PRESENTATION_ExOth.tex2
-rw-r--r--manual/PRESENTATION_ExSyn.tex2
-rw-r--r--manual/PRESENTATION_Intro.tex8
-rw-r--r--manual/PRESENTATION_Prog.tex2
-rw-r--r--manual/presentation.tex2
-rw-r--r--misc/create_vcxsrc.sh2
-rw-r--r--passes/sat/eval.cc2
-rw-r--r--techlibs/ecp5/arith_map.v2
-rw-r--r--techlibs/ecp5/ecp5_gsr.cc2
-rw-r--r--techlibs/ecp5/synth_ecp5.cc2
-rw-r--r--techlibs/gowin/arith_map.v2
-rw-r--r--techlibs/nexus/arith_map.v2
-rw-r--r--techlibs/nexus/synth_nexus.cc2
-rwxr-xr-xtests/vloghtb/run-test.sh2
20 files changed, 26 insertions, 26 deletions
diff --git a/Makefile b/Makefile
index 596fad2e1..07ebed642 100644
--- a/Makefile
+++ b/Makefile
@@ -956,7 +956,7 @@ ifeq ($(ENABLE_ABC),1)
cp -r $(PROGRAM_PREFIX)yosys-abc.exe abc/lib/x86/pthreadVC2.dll yosys-win32-mxebin-$(YOSYS_VER)/
endif
echo -en 'This is Yosys $(YOSYS_VER) for Win32.\r\n' > yosys-win32-mxebin-$(YOSYS_VER)/readme.txt
- echo -en 'Documentation at http://yosyshq.net/yosys/.\r\n' >> yosys-win32-mxebin-$(YOSYS_VER)/readme.txt
+ echo -en 'Documentation at https://yosyshq.net/yosys/.\r\n' >> yosys-win32-mxebin-$(YOSYS_VER)/readme.txt
zip -r yosys-win32-mxebin-$(YOSYS_VER).zip yosys-win32-mxebin-$(YOSYS_VER)/
endif
diff --git a/README.md b/README.md
index 09e46a808..ab656352a 100644
--- a/README.md
+++ b/README.md
@@ -38,11 +38,11 @@ Web Site and Other Resources
============================
More information and documentation can be found on the Yosys web site:
-- http://yosyshq.net/yosys/
+- https://yosyshq.net/yosys/
The "Documentation" page on the web site contains links to more resources,
including a manual that even describes some of the Yosys internals:
-- http://yosyshq.net/yosys/documentation.html
+- https://yosyshq.net/yosys/documentation.html
The directory `guidelines` contains additional information
for people interested in using the Yosys C++ APIs.
@@ -92,7 +92,7 @@ For Cygwin use the following command to install all prerequisites, or select the
There are also pre-compiled Yosys binary packages for Ubuntu and Win32 as well
as a source distribution for Visual Studio. Visit the Yosys download page for
-more information: http://yosyshq.net/yosys/download.html
+more information: https://yosyshq.net/yosys/download.html
To configure the build system to use a specific compiler, use one of
@@ -568,7 +568,7 @@ Building the documentation
==========================
Note that there is no need to build the manual if you just want to read it.
-Simply download the PDF from http://yosyshq.net/yosys/documentation.html
+Simply download the PDF from https://yosyshq.net/yosys/documentation.html
instead.
On Ubuntu, texlive needs these packages to be able to build the manual:
diff --git a/manual/APPNOTE_010_Verilog_to_BLIF.tex b/manual/APPNOTE_010_Verilog_to_BLIF.tex
index 5b1c0c359..0d0d3e5cd 100644
--- a/manual/APPNOTE_010_Verilog_to_BLIF.tex
+++ b/manual/APPNOTE_010_Verilog_to_BLIF.tex
@@ -438,7 +438,7 @@ design to fit a certain need without actually touching the RTL code.
\bibitem{yosys}
Clifford Wolf. The Yosys Open SYnthesis Suite. \\
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\bibitem{bigsim}
yosys-bigsim, a collection of real-world Verilog designs for regression testing purposes. \\
diff --git a/manual/APPNOTE_011_Design_Investigation.tex b/manual/APPNOTE_011_Design_Investigation.tex
index 33df79f61..dc2284301 100644
--- a/manual/APPNOTE_011_Design_Investigation.tex
+++ b/manual/APPNOTE_011_Design_Investigation.tex
@@ -1042,7 +1042,7 @@ framework for new algorithms alike.
\bibitem{yosys}
Clifford Wolf. The Yosys Open SYnthesis Suite.
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\bibitem{graphviz}
Graphviz - Graph Visualization Software.
diff --git a/manual/APPNOTE_012_Verilog_to_BTOR.tex b/manual/APPNOTE_012_Verilog_to_BTOR.tex
index ebaa3e420..a96e26503 100644
--- a/manual/APPNOTE_012_Verilog_to_BTOR.tex
+++ b/manual/APPNOTE_012_Verilog_to_BTOR.tex
@@ -411,7 +411,7 @@ verification benchmarks with or without memories from Verilog designs.
\bibitem{yosys}
Clifford Wolf. The Yosys Open SYnthesis Suite. \\
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\bibitem{boolector}
Robert Brummayer and Armin Biere, Boolector: An Efficient SMT Solver for Bit-Vectors and Arrays\\
diff --git a/manual/PRESENTATION_ExAdv.tex b/manual/PRESENTATION_ExAdv.tex
index 1cb99e8fa..6a426ff2b 100644
--- a/manual/PRESENTATION_ExAdv.tex
+++ b/manual/PRESENTATION_ExAdv.tex
@@ -890,7 +890,7 @@ Questions?
\bigskip
\bigskip
\begin{center}
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\end{center}
\end{frame}
diff --git a/manual/PRESENTATION_ExOth.tex b/manual/PRESENTATION_ExOth.tex
index ddac5c72f..3f5113e3c 100644
--- a/manual/PRESENTATION_ExOth.tex
+++ b/manual/PRESENTATION_ExOth.tex
@@ -221,7 +221,7 @@ Questions?
\bigskip
\bigskip
\begin{center}
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\end{center}
\end{frame}
diff --git a/manual/PRESENTATION_ExSyn.tex b/manual/PRESENTATION_ExSyn.tex
index 11f205f1f..d7cfdc6f2 100644
--- a/manual/PRESENTATION_ExSyn.tex
+++ b/manual/PRESENTATION_ExSyn.tex
@@ -509,7 +509,7 @@ Questions?
\bigskip
\bigskip
\begin{center}
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\end{center}
\end{frame}
diff --git a/manual/PRESENTATION_Intro.tex b/manual/PRESENTATION_Intro.tex
index 2b1fd9d10..22048bc3d 100644
--- a/manual/PRESENTATION_Intro.tex
+++ b/manual/PRESENTATION_Intro.tex
@@ -476,7 +476,7 @@ Command reference:
\begin{itemize}
\item Use ``{\tt help}'' for a command list and ``{\tt help \it command}'' for details.
\item Or run ``{\tt yosys -H}'' or ``{\tt yosys -h \it command}''.
-\item Or go to \url{http://yosyshq.net/yosys/documentation.html}.
+\item Or go to \url{https://yosyshq.net/yosys/documentation.html}.
\end{itemize}
\bigskip
@@ -913,11 +913,11 @@ control logic because it is simpler than setting up a commercial flow.
\begin{frame}{\subsecname}
\begin{itemize}
\item Website: \\
-\smallskip\hskip1cm\url{http://yosyshq.net/yosys/}
+\smallskip\hskip1cm\url{https://yosyshq.net/yosys/}
\bigskip
\item Manual, Command Reference, Application Notes: \\
-\smallskip\hskip1cm\url{http://yosyshq.net/yosys/documentation.html}
+\smallskip\hskip1cm\url{https://yosyshq.net/yosys/documentation.html}
\bigskip
\item Instead of a mailing list we have a SubReddit: \\
@@ -950,7 +950,7 @@ Questions?
\bigskip
\bigskip
\begin{center}
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\end{center}
\end{frame}
diff --git a/manual/PRESENTATION_Prog.tex b/manual/PRESENTATION_Prog.tex
index aeb9b137c..b0390cb99 100644
--- a/manual/PRESENTATION_Prog.tex
+++ b/manual/PRESENTATION_Prog.tex
@@ -590,7 +590,7 @@ Questions?
\bigskip
\bigskip
\begin{center}
-\url{http://yosyshq.net/yosys/}
+\url{https://yosyshq.net/yosys/}
\end{center}
\end{frame}
diff --git a/manual/presentation.tex b/manual/presentation.tex
index 08e409394..ea8e37bc9 100644
--- a/manual/presentation.tex
+++ b/manual/presentation.tex
@@ -81,7 +81,7 @@
\title{Yosys Open SYnthesis Suite}
\author{Clifford Wolf}
-\institute{http://yosyshq.net/yosys/}
+\institute{https://yosyshq.net/yosys/}
\usetheme{Madrid}
\usecolortheme{seagull}
diff --git a/misc/create_vcxsrc.sh b/misc/create_vcxsrc.sh
index 2bf282427..dc4ac13e0 100644
--- a/misc/create_vcxsrc.sh
+++ b/misc/create_vcxsrc.sh
@@ -6,7 +6,7 @@ yosysver="$2"
gitsha="$3"
rm -rf YosysVS-Tpl-v2.zip YosysVS
-wget http://yosyshq.net/yosys/nogit/YosysVS-Tpl-v2.zip
+wget https://yosyshq.net/yosys/nogit/YosysVS-Tpl-v2.zip
unzip YosysVS-Tpl-v2.zip
rm -f YosysVS-Tpl-v2.zip
diff --git a/passes/sat/eval.cc b/passes/sat/eval.cc
index 056115031..05879426e 100644
--- a/passes/sat/eval.cc
+++ b/passes/sat/eval.cc
@@ -18,7 +18,7 @@
*/
// [[CITE]] VlogHammer Verilog Regression Test Suite
-// http://yosyshq.net/yosys/vloghammer.html
+// https://yosyshq.net/yosys/vloghammer.html
#include "kernel/register.h"
#include "kernel/celltypes.h"
diff --git a/techlibs/ecp5/arith_map.v b/techlibs/ecp5/arith_map.v
index 0e56a18bd..9334785ae 100644
--- a/techlibs/ecp5/arith_map.v
+++ b/techlibs/ecp5/arith_map.v
@@ -2,7 +2,7 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
- * Copyright (C) 2018 David Shah <dave@ds0.me>
+ * Copyright (C) 2018 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/techlibs/ecp5/ecp5_gsr.cc b/techlibs/ecp5/ecp5_gsr.cc
index a676548f2..62b231aab 100644
--- a/techlibs/ecp5/ecp5_gsr.cc
+++ b/techlibs/ecp5/ecp5_gsr.cc
@@ -2,7 +2,7 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
- * Copyright (C) 2019 David Shah <dave@ds0.me>
+ * Copyright (C) 2019 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/techlibs/ecp5/synth_ecp5.cc b/techlibs/ecp5/synth_ecp5.cc
index b30884ba3..2df9a1f87 100644
--- a/techlibs/ecp5/synth_ecp5.cc
+++ b/techlibs/ecp5/synth_ecp5.cc
@@ -2,7 +2,7 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
- * Copyright (C) 2018 David Shah <dave@ds0.me>
+ * Copyright (C) 2018 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/techlibs/gowin/arith_map.v b/techlibs/gowin/arith_map.v
index b504e5bd8..2d48fa752 100644
--- a/techlibs/gowin/arith_map.v
+++ b/techlibs/gowin/arith_map.v
@@ -2,7 +2,7 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
- * Copyright (C) 2018 David Shah <dave@ds0.me>
+ * Copyright (C) 2018 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/techlibs/nexus/arith_map.v b/techlibs/nexus/arith_map.v
index ce81a96de..9a1fedfc8 100644
--- a/techlibs/nexus/arith_map.v
+++ b/techlibs/nexus/arith_map.v
@@ -2,7 +2,7 @@
* yosys -- Yosys Open SYnthesis Suite
*
* Copyright (C) 2012 Claire Xenia Wolf <claire@yosyshq.com>
- * Copyright (C) 2018 David Shah <dave@ds0.me>
+ * Copyright (C) 2018 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/techlibs/nexus/synth_nexus.cc b/techlibs/nexus/synth_nexus.cc
index 9134b6e2a..d725546cc 100644
--- a/techlibs/nexus/synth_nexus.cc
+++ b/techlibs/nexus/synth_nexus.cc
@@ -1,7 +1,7 @@
/*
* yosys -- Yosys Open SYnthesis Suite
*
- * Copyright (C) 2020 David Shah <dave@ds0.me>
+ * Copyright (C) 2020 gatecat <gatecat@ds0.me>
*
* Permission to use, copy, modify, and/or distribute this software for any
* purpose with or without fee is hereby granted, provided that the above
diff --git a/tests/vloghtb/run-test.sh b/tests/vloghtb/run-test.sh
index 9e22d1b74..3c0689619 100755
--- a/tests/vloghtb/run-test.sh
+++ b/tests/vloghtb/run-test.sh
@@ -3,7 +3,7 @@
set -ex
rm -rf Makefile refdat rtl scripts spec
-wget -N http://yosyshq.net/yosys/nogit/vloghammer_tb.tar.bz2
+wget -N https://yosyshq.net/yosys/nogit/vloghammer_tb.tar.bz2
tar --strip=1 -xjf vloghammer_tb.tar.bz2
make clean
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-26 21:29:42 +0000