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| author | Eddie Hung <eddie@fpgeh.com> | 2020-05-02 14:22:37 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-05-02 14:22:37 -0700 |
| commit | db13852ed657294d9919e668201abe85bc3fba44 (patch) | |
| tree | 2e9173ee67e53da14d3e7d29e0fd76236464f1d0 /tests | |
| parent | 2285cf1219bfd3b6e9bdb81357290de12e8b74bd (diff) | |
| download | yosys-db13852ed657294d9919e668201abe85bc3fba44.tar.gz yosys-db13852ed657294d9919e668201abe85bc3fba44.tar.bz2 yosys-db13852ed657294d9919e668201abe85bc3fba44.zip | |
test: add test for #2014
Diffstat (limited to 'tests')
| -rw-r--r-- | tests/various/bug2014.ys | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/tests/various/bug2014.ys b/tests/various/bug2014.ys new file mode 100644 index 000000000..10131fc43 --- /dev/null +++ b/tests/various/bug2014.ys @@ -0,0 +1,12 @@ +read_verilog <<EOT +module test ( + input signed [1:0] n, + output [3:0] dout +); + assign dout = n + 4'sd 4; +endmodule +EOT + +alumacc +select -assert-count 1 t:$alu +equiv_opt -assert opt -fine |