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| author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 11:23:00 -0800 |
|---|---|---|
| committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 11:23:00 -0800 |
| commit | a8803a1519ce9191c43cd9a0f09d6c3ae99666e9 (patch) | |
| tree | 88dcf42e2eb5121441fa95ea9146bc8b217b0160 /tests | |
| parent | 5994382a20a0b7e890d22d032eecb39b61e0b3ce (diff) | |
| parent | d55790909c3b4244889d092c8eae630c7efd1aee (diff) | |
| download | yosys-a8803a1519ce9191c43cd9a0f09d6c3ae99666e9.tar.gz yosys-a8803a1519ce9191c43cd9a0f09d6c3ae99666e9.tar.bz2 yosys-a8803a1519ce9191c43cd9a0f09d6c3ae99666e9.zip | |
Merge remote-tracking branch 'origin/master' into xaig
Diffstat (limited to 'tests')
| -rwxr-xr-x | tests/tools/autotest.sh | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 34007b689..2b8e60200 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -28,7 +28,7 @@ if [ ! -f $toolsdir/cmp_tbdata -o $toolsdir/cmp_tbdata.c -nt $toolsdir/cmp_tbdat ( set -ex; ${CC:-gcc} -Wall -o $toolsdir/cmp_tbdata $toolsdir/cmp_tbdata.c; ) || exit 1 fi -while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do +while getopts xmGl:wkjvref:s:p:n:S:I:-: opt; do case "$opt" in x) use_xsim=true ;; @@ -65,8 +65,6 @@ while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do include_opts="$include_opts -I $OPTARG" xinclude_opts="$xinclude_opts -i $OPTARG" minclude_opts="$minclude_opts +incdir+$OPTARG" ;; - B) - backend_opts="$backend_opts $OPTARG" ;; -) case "${OPTARG}" in xfirrtl) @@ -84,7 +82,7 @@ while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do ;; esac;; *) - echo "Usage: $0 [-x|-m] [-G] [-w] [-k] [-j] [-v] [-r] [-e] [-l libs] [-f frontend] [-s script] [-p cmdstring] [-n iters] [-S seed] [-I incdir] [-B backend_opt] [--xfirrtl FIRRTL test exclude file] [--firrtl2verilog command to generate verilog from firrtl] verilog-files\n" >&2 + echo "Usage: $0 [-x|-m] [-G] [-w] [-k] [-j] [-v] [-r] [-e] [-l libs] [-f frontend] [-s script] [-p cmdstring] [-n iters] [-S seed] [-I incdir] [--xfirrtl FIRRTL test exclude file] [--firrtl2verilog command to generate verilog from firrtl] verilog-files\n" >&2 exit 1 esac done |