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authorEddie Hung <eddie@fpgeh.com>2019-06-10 11:02:54 -0700
committerEddie Hung <eddie@fpgeh.com>2019-06-10 11:02:54 -0700
commit352c532bb2baa0ef78206e1824c4b1eea99dca6d (patch)
treea02f2801c5f7f91d4fafba4a5bf92cec8701e0a6 /tests
parentd5f0b73fd9ff3a5d015faf566adcebdc29bab2b2 (diff)
parenta91ea6612a73568782c80bd12ce2875353e2b5c5 (diff)
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Merge remote-tracking branch 'origin/master' into xc7mux
Diffstat (limited to 'tests')
-rwxr-xr-xtests/aiger/run-test.sh7
1 files changed, 6 insertions, 1 deletions
diff --git a/tests/aiger/run-test.sh b/tests/aiger/run-test.sh
index e56d0fa80..f52eb4ac1 100755
--- a/tests/aiger/run-test.sh
+++ b/tests/aiger/run-test.sh
@@ -2,9 +2,14 @@
set -e
+# NB: *.aag and *.aig must contain a symbol table naming the primary
+# inputs and outputs, otherwise ABC and Yosys will name them
+# arbitrarily (and inconsistently with each other).
+
for aag in *.aag; do
# Since ABC cannot read *.aag, read the *.aig instead
- # (which would have been created by the reference aig2aig utility)
+ # (which would have been created by the reference aig2aig utility,
+ # available from http://fmv.jku.at/aiger/)
../../yosys-abc -c "read -c ${aag%.*}.aig; write ${aag%.*}_ref.v"
../../yosys -p "
read_verilog ${aag%.*}_ref.v