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| author | Zachary Snow <zach@zachjs.com> | 2021-06-22 10:39:57 -0400 |
|---|---|---|
| committer | Zachary Snow <zachary.j.snow@gmail.com> | 2021-07-15 11:57:20 -0400 |
| commit | a9c8ca21d583c58a38931389f90bbaae0caec0d6 (patch) | |
| tree | eab021de70957cf08a44d296fbf63b29e3a3e9e7 /tests/verilog/struct_access.ys | |
| parent | 1aab608cffa19332dc5cf722def7413b16f5ee54 (diff) | |
| download | yosys-a9c8ca21d583c58a38931389f90bbaae0caec0d6.tar.gz yosys-a9c8ca21d583c58a38931389f90bbaae0caec0d6.tar.bz2 yosys-a9c8ca21d583c58a38931389f90bbaae0caec0d6.zip | |
sv: fix two struct access bugs
- preserve signedness of struct members
- fix initial width detection of struct members (e.g., in case expressions)
Diffstat (limited to 'tests/verilog/struct_access.ys')
| -rw-r--r-- | tests/verilog/struct_access.ys | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/tests/verilog/struct_access.ys b/tests/verilog/struct_access.ys new file mode 100644 index 000000000..29d569c01 --- /dev/null +++ b/tests/verilog/struct_access.ys @@ -0,0 +1,4 @@ +read_verilog -formal -sv struct_access.sv +proc +opt -full +sat -verify -seq 1 -prove-asserts -show-all |