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| author | Eddie Hung <eddie@fpgeh.com> | 2020-02-15 08:29:10 -0800 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-02-27 10:17:29 -0800 |
| commit | f858219c4ed18fb5886641efd1e71f5aad0b1c84 (patch) | |
| tree | d1d7f73c52a0bfe646b46dcf7947b51701480e3f /tests/various | |
| parent | 717fb492b35a93ae78e33f742d8c3d493be7e4e8 (diff) | |
| download | yosys-f858219c4ed18fb5886641efd1e71f5aad0b1c84.tar.gz yosys-f858219c4ed18fb5886641efd1e71f5aad0b1c84.tar.bz2 yosys-f858219c4ed18fb5886641efd1e71f5aad0b1c84.zip | |
Cleanup tests
Diffstat (limited to 'tests/various')
| -rw-r--r-- | tests/various/bug1480.ys | 18 | ||||
| -rw-r--r-- | tests/various/pmux2shiftx.v | 2 |
2 files changed, 1 insertions, 19 deletions
diff --git a/tests/various/bug1480.ys b/tests/various/bug1480.ys deleted file mode 100644 index 84faea08a..000000000 --- a/tests/various/bug1480.ys +++ /dev/null @@ -1,18 +0,0 @@ -read_verilog << EOF -module top(...); - -input signed [17:0] A; -input signed [17:0] B; -output X; -output Y; - -wire [35:0] P; -assign P = A * B; - -assign X = P[0]; -assign Y = P[35]; - -endmodule -EOF - -synth_xilinx diff --git a/tests/various/pmux2shiftx.v b/tests/various/pmux2shiftx.v index 563394080..c1994e92c 100644 --- a/tests/various/pmux2shiftx.v +++ b/tests/various/pmux2shiftx.v @@ -33,7 +33,7 @@ module pmux2shiftx_test ( end endmodule -module issue01135(input [7:0] i, output o); +module issue01135(input [7:0] i, output reg o); always @* case (i[6:3]) 4: o <= i[0]; |