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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 13:51:22 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-06 13:51:22 -0700 |
| commit | ccdf989025e57da7dfd5ab609676ebe3cfb2c2d6 (patch) | |
| tree | 68d9f57cb227ba5b7114fc42b95e86522d602e48 /tests/various | |
| parent | dc7b8c4b942f9d9bc61a87a81291244d0b73843b (diff) | |
| download | yosys-ccdf989025e57da7dfd5ab609676ebe3cfb2c2d6.tar.gz yosys-ccdf989025e57da7dfd5ab609676ebe3cfb2c2d6.tar.bz2 yosys-ccdf989025e57da7dfd5ab609676ebe3cfb2c2d6.zip | |
Support cascading $pmux.A with $mux.A and $mux.B
Diffstat (limited to 'tests/various')
| -rw-r--r-- | tests/various/muxpack.v | 25 | ||||
| -rw-r--r-- | tests/various/muxpack.ys | 15 |
2 files changed, 40 insertions, 0 deletions
diff --git a/tests/various/muxpack.v b/tests/various/muxpack.v index e847fef27..fe0150532 100644 --- a/tests/various/muxpack.v +++ b/tests/various/muxpack.v @@ -85,3 +85,28 @@ always @* begin if (s == 0) o <= i[2*W+:W]; end endmodule + +module mux_case_unbal_7_7#(parameter N=7, parameter W=7) (input [N*W-1:0] i, input [$clog2(N)-1:0] s, output reg [W-1:0] o); +always @* begin + o <= {W{1'bx}}; + case (s) + 0: o <= i[0*W+:W]; + default: + case (s) + 1: o <= i[1*W+:W]; + 2: o <= i[2*W+:W]; + default: + case (s) + 3: o <= i[3*W+:W]; + 4: o <= i[4*W+:W]; + 5: o <= i[5*W+:W]; + default: + case (s) + 6: o <= i[6*W+:W]; + default: o <= i[7*W+:W]; + endcase + endcase + endcase + endcase +end +endmodule diff --git a/tests/various/muxpack.ys b/tests/various/muxpack.ys index 178860b88..4dcb9ed89 100644 --- a/tests/various/muxpack.ys +++ b/tests/various/muxpack.ys @@ -118,3 +118,18 @@ design -import gold -as gold design -import gate -as gate miter -equiv -flatten -make_assert -make_outputs gold gate miter sat -verify -prove-asserts -show-ports miter + +design -load read +hierarchy -top mux_case_unbal_7_7 +prep +design -save gold +muxpack +opt +stat +select -assert-count 0 t:$mux +select -assert-count 1 t:$pmux +design -stash gate +design -import gold -as gold +design -import gate -as gate +miter -equiv -flatten -make_assert -make_outputs gold gate miter +sat -verify -prove-asserts -show-ports miter |