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| author | Eddie Hung <eddie@fpgeh.com> | 2019-06-30 11:48:01 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2019-06-30 11:48:01 -0700 |
| commit | 04459cb30aff2341d6de43f7eefe5acaa4bb1db1 (patch) | |
| tree | 350fbec022ddbd5e26087ae961e9aabe37216c83 /tests/various/specify.v | |
| parent | dc677c791de438a493ad5e0101987da29c6a6d0f (diff) | |
| download | yosys-04459cb30aff2341d6de43f7eefe5acaa4bb1db1.tar.gz yosys-04459cb30aff2341d6de43f7eefe5acaa4bb1db1.tar.bz2 yosys-04459cb30aff2341d6de43f7eefe5acaa4bb1db1.zip | |
Comment out invalid syntax
Diffstat (limited to 'tests/various/specify.v')
| -rw-r--r-- | tests/various/specify.v | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/various/specify.v b/tests/various/specify.v index b1f399267..985879f85 100644 --- a/tests/various/specify.v +++ b/tests/various/specify.v @@ -33,9 +33,9 @@ module issue01144(input clk, d, output q); specify // Fails: (posedge clk => (q +: d)) = (3,1); - (/*posedge*/ clk => (q +: d)) = (3,1); + //(/*posedge*/ clk => (q +: d)) = (3,1); // Invalid syntax (posedge clk *> (q +: d)) = (3,1); - (/*posedge*/ clk *> (q +: d)) = (3,1); + //(/*posedge*/ clk *> (q +: d)) = (3,1); // Invalid syntax // Works: (/*posedge*/ clk => q) = (3,1); |