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authorKamil Rakoczy <krakoczy@antmicro.com>2020-07-10 09:59:48 +0200
committerKamil Rakoczy <krakoczy@antmicro.com>2020-07-10 09:59:48 +0200
commitde649b91943816149e28a49acb4718e41be2589f (patch)
tree88bce35bfb00ef28970a71c2188dff498b0add8d /tests/various/signed.ys
parentc0bcbe1f6254f050207a91506a63aa9d784bd8d6 (diff)
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Revert "Revert PRs #2203 and #2244."
This reverts commit 9c120b89ace6c111aa4677616947d18d980b9c1a.
Diffstat (limited to 'tests/various/signed.ys')
-rw-r--r--tests/various/signed.ys28
1 files changed, 28 insertions, 0 deletions
diff --git a/tests/various/signed.ys b/tests/various/signed.ys
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+# SV LRM A2.2.1
+
+read_verilog -sv <<EOT
+module test_signed();
+parameter integer signed a = 0;
+parameter integer unsigned b = 0;
+
+endmodule
+EOT
+
+design -reset
+read_verilog -sv <<EOT
+module test_signed();
+parameter logic signed [7:0] a = 0;
+parameter logic unsigned [7:0] b = 0;
+
+endmodule
+EOT
+
+design -reset
+logger -expect error "syntax error, unexpected TOK_INTEGER" 1
+read_verilog -sv <<EOT
+module test_signed();
+parameter signed integer a = 0;
+parameter unsigned integer b = 0;
+
+endmodule
+EOT