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| author | Zachary Snow <zach@zachjs.com> | 2020-12-26 21:38:13 -0700 |
|---|---|---|
| committer | Zachary Snow <zach@zachjs.com> | 2020-12-26 21:47:38 -0700 |
| commit | 750831e3e096398856053d9cbc2701e49fe0c29e (patch) | |
| tree | ff3cc3083ffae53c35527d1c6a296baf91fabc1e /tests/various/memory_word_as_index.v | |
| parent | af457ce8d05bb57a48831c3c252c708625ae0ffd (diff) | |
| download | yosys-750831e3e096398856053d9cbc2701e49fe0c29e.tar.gz yosys-750831e3e096398856053d9cbc2701e49fe0c29e.tar.bz2 yosys-750831e3e096398856053d9cbc2701e49fe0c29e.zip | |
Fix elaboration of whole memory words used as indices
Diffstat (limited to 'tests/various/memory_word_as_index.v')
| -rw-r--r-- | tests/various/memory_word_as_index.v | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/tests/various/memory_word_as_index.v b/tests/various/memory_word_as_index.v new file mode 100644 index 000000000..a99ea9566 --- /dev/null +++ b/tests/various/memory_word_as_index.v @@ -0,0 +1,21 @@ +`define DATA 64'h492e5c4d7747e032 + +`define GATE(n, expr) \ +module gate``n(sel, out); \ + input wire [3:0] sel; \ + output wire out; \ + reg [63:0] bits; \ + reg [5:0] ptrs[15:0]; \ + initial bits = `DATA; \ + initial $readmemh("memory_word_as_index.data", ptrs); \ + assign out = expr; \ +endmodule + +`GATE(1, bits[ptrs[sel]]) +`GATE(2, bits[ptrs[sel][5:0]]) +`GATE(3, bits[ptrs[sel]+:1]) + +module gold(sel, out); + input wire [3:0] sel; + output wire out = `DATA >> (sel * 4); +endmodule |