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author | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 09:22:29 -0800 |
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committer | Eddie Hung <eddieh@ece.ubc.ca> | 2019-02-21 09:22:29 -0800 |
commit | 8e789da74c6702ededc668e3dbd899de8d0c2821 (patch) | |
tree | 3c42aaef864ce9ec31e2a9d57d52e2475e1470a2 /tests/tools | |
parent | 4035ec8933cd187670788fb6eca5cefa80fe7170 (diff) | |
download | yosys-8e789da74c6702ededc668e3dbd899de8d0c2821.tar.gz yosys-8e789da74c6702ededc668e3dbd899de8d0c2821.tar.bz2 yosys-8e789da74c6702ededc668e3dbd899de8d0c2821.zip |
Revert "Add -B option to autotest.sh to append to backend_opts"
This reverts commit 281f2aadcab01465f83a3f3a697eec42503e9f8b.
Diffstat (limited to 'tests/tools')
-rwxr-xr-x | tests/tools/autotest.sh | 6 |
1 files changed, 2 insertions, 4 deletions
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 6fdd1e80a..218edf931 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -28,7 +28,7 @@ if [ ! -f $toolsdir/cmp_tbdata -o $toolsdir/cmp_tbdata.c -nt $toolsdir/cmp_tbdat ( set -ex; ${CC:-gcc} -Wall -o $toolsdir/cmp_tbdata $toolsdir/cmp_tbdata.c; ) || exit 1 fi -while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do +while getopts xmGl:wkjvref:s:p:n:S:I:-: opt; do case "$opt" in x) use_xsim=true ;; @@ -65,8 +65,6 @@ while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do include_opts="$include_opts -I $OPTARG" xinclude_opts="$xinclude_opts -i $OPTARG" minclude_opts="$minclude_opts +incdir+$OPTARG" ;; - B) - backend_opts="$backend_opts $OPTARG" ;; -) case "${OPTARG}" in xfirrtl) @@ -84,7 +82,7 @@ while getopts xmGl:wkjvref:s:p:n:S:I:B:-: opt; do ;; esac;; *) - echo "Usage: $0 [-x|-m] [-G] [-w] [-k] [-j] [-v] [-r] [-e] [-l libs] [-f frontend] [-s script] [-p cmdstring] [-n iters] [-S seed] [-I incdir] [-B backend_opt] [--xfirrtl FIRRTL test exclude file] [--firrtl2verilog command to generate verilog from firrtl] verilog-files\n" >&2 + echo "Usage: $0 [-x|-m] [-G] [-w] [-k] [-j] [-v] [-r] [-e] [-l libs] [-f frontend] [-s script] [-p cmdstring] [-n iters] [-S seed] [-I incdir] [--xfirrtl FIRRTL test exclude file] [--firrtl2verilog command to generate verilog from firrtl] verilog-files\n" >&2 exit 1 esac done |