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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-02-23 19:42:51 +0100 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-03-08 20:16:29 +0100 |
| commit | a3528649c82ed7c6d14850affef8e9368f4fe065 (patch) | |
| tree | 05fe743a30c58432246a4df406b591b6acc21794 /tests/tools/autotest.sh | |
| parent | 89c74ffd7189d4898feb476ff70376385d516eb2 (diff) | |
| download | yosys-a3528649c82ed7c6d14850affef8e9368f4fe065.tar.gz yosys-a3528649c82ed7c6d14850affef8e9368f4fe065.tar.bz2 yosys-a3528649c82ed7c6d14850affef8e9368f4fe065.zip | |
memory_dff: Remove now-useless write port handling.
Diffstat (limited to 'tests/tools/autotest.sh')
| -rwxr-xr-x | tests/tools/autotest.sh | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/tests/tools/autotest.sh b/tests/tools/autotest.sh index 72a3d51eb..e4aef9917 100755 --- a/tests/tools/autotest.sh +++ b/tests/tools/autotest.sh @@ -197,7 +197,7 @@ do test_passes -f "$frontend $include_opts" -p "hierarchy; synth -run coarse; techmap; opt; abc -dff" ${bn}_ref.${refext} if [ -n "$firrtl2verilog" ]; then if test -z "$xfirrtl" || ! grep "$fn" "$xfirrtl" ; then - "$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep -nordff; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine; pmuxtree" ${bn}_ref.${refext} + "$toolsdir"/../../yosys -b "firrtl" -o ${bn}_ref.fir -f "$frontend $include_opts" -p "prep; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine; pmuxtree" ${bn}_ref.${refext} $firrtl2verilog -i ${bn}_ref.fir -o ${bn}_ref.fir.v test_passes -f "$frontend $include_opts" -p "hierarchy; proc; opt -nodffe -nosdff; fsm; opt; memory; opt -full -fine" ${bn}_ref.fir.v fi |