diff options
| author | Eddie Hung <eddie@fpgeh.com> | 2020-04-13 14:29:44 -0700 |
|---|---|---|
| committer | Eddie Hung <eddie@fpgeh.com> | 2020-04-13 14:29:44 -0700 |
| commit | 091297b9ee9c7874f17abb855f6c612c448cec70 (patch) | |
| tree | 9de7c3ffee611f55df6423fc583b933eef8813e8 /tests/techmap/zinit.ys | |
| parent | 70bca35f9cc820c05ddbd02703c13f9cf9135756 (diff) | |
| download | yosys-091297b9ee9c7874f17abb855f6c612c448cec70.tar.gz yosys-091297b9ee9c7874f17abb855f6c612c448cec70.tar.bz2 yosys-091297b9ee9c7874f17abb855f6c612c448cec70.zip | |
tests: zinit on $adff
Diffstat (limited to 'tests/techmap/zinit.ys')
| -rw-r--r-- | tests/techmap/zinit.ys | 37 |
1 files changed, 18 insertions, 19 deletions
diff --git a/tests/techmap/zinit.ys b/tests/techmap/zinit.ys index 3652f2d72..caeab69d3 100644 --- a/tests/techmap/zinit.ys +++ b/tests/techmap/zinit.ys @@ -1,24 +1,23 @@ read_verilog -icells <<EOT -module top(input C, D, S, R, output [16:0] Q); -(* init = {17{1'b1}} *) -wire [16:0] Q; -$_DFF_NN0_ dff0 (.C(C), .D(D), .R(R), .Q(Q[0])); -$_DFF_NN1_ dff1 (.C(C), .D(D), .R(R), .Q(Q[1])); -$_DFF_NP0_ dff2 (.C(C), .D(D), .R(R), .Q(Q[2])); -$_DFF_NP1_ dff3 (.C(C), .D(D), .R(R), .Q(Q[3])); -$_DFF_PN0_ dff4 (.C(C), .D(D), .R(R), .Q(Q[4])); -$_DFF_PN1_ dff5 (.C(C), .D(D), .R(R), .Q(Q[5])); -$_DFF_PP0_ dff6 (.C(C), .D(D), .R(R), .Q(Q[6])); -$_DFF_PP1_ dff7 (.C(C), .D(D), .R(R), .Q(Q[7])); +module top(input C, R, input [1:0] D, (* init = {12{1'b1}} *) output [11:0] Q); -//$_DFFSR_NNN_ dffsr0 (.C(C), .D(D), .S(S), .R(R), .Q(Q[8])); -//$_DFFSR_NNP_ dffsr1 (.C(C), .D(D), .S(S), .R(R), .Q(Q[9])); -//$_DFFSR_NPN_ dffsr2 (.C(C), .D(D), .S(S), .R(R), .Q(Q[10])); -//$_DFFSR_NPP_ dffsr3 (.C(C), .D(D), .S(S), .R(R), .Q(Q[11])); -//$_DFFSR_PNN_ dffsr4 (.C(C), .D(D), .S(S), .R(R), .Q(Q[12])); -//$_DFFSR_PNP_ dffsr5 (.C(C), .D(D), .S(S), .R(R), .Q(Q[13])); -//$_DFFSR_PPN_ dffsr6 (.C(C), .D(D), .S(S), .R(R), .Q(Q[14])); -//$_DFFSR_PPP_ dffsr7 (.C(C), .D(D), .S(S), .R(R), .Q(Q[15])); +(* init = 1'b1 *) +wire unused; + +$_DFF_NN0_ dff0 (.C(C), .D(D[0]), .R(R), .Q(Q[0])); +$_DFF_NN1_ dff1 (.C(C), .D(D[0]), .R(R), .Q(Q[1])); +$_DFF_NP0_ dff2 (.C(C), .D(D[0]), .R(R), .Q(Q[2])); +$_DFF_NP1_ dff3 (.C(C), .D(D[0]), .R(R), .Q(Q[3])); +$_DFF_PN0_ dff4 (.C(C), .D(D[0]), .R(R), .Q(Q[4])); +$_DFF_PN1_ dff5 (.C(C), .D(D[0]), .R(R), .Q(Q[5])); +$_DFF_PP0_ dff6 (.C(C), .D(D[0]), .R(R), .Q(Q[6])); +$_DFF_PP1_ dff7 (.C(C), .D(D[0]), .R(R), .Q(Q[7])); + +$adff #(.WIDTH(2), .CLK_POLARITY(1), .ARST_POLARITY(1'b0), .ARST_VALUE(2'd2)) dff8 (.CLK(C), .ARST(R), .D(D), .Q(Q[9:8])); +$adff #(.WIDTH(2), .CLK_POLARITY(0), .ARST_POLARITY(1'b1), .ARST_VALUE(2'd1)) dff9 (.CLK(C), .ARST(R), .D(D), .Q(Q[11:10])); endmodule EOT equiv_opt -map +/simcells.v -multiclock zinit +design -load postopt + +select -assert-count 1 w:unused a:init %i |