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| author | Kazuki Sakamoto <sakamoto@splhack.org> | 2020-06-14 15:15:59 -0700 |
|---|---|---|
| committer | Kazuki Sakamoto <sakamoto@splhack.org> | 2020-06-19 17:39:20 -0700 |
| commit | 185bbbe681d02874796e70a1ee147f4b8dca6cbb (patch) | |
| tree | 31ad1e634e09fdd40776a8c44a407d2b6d416f69 /tests/svtypes | |
| parent | 338ecbe02f8bb3cc4d69de1445c7f398a814b4e4 (diff) | |
| download | yosys-185bbbe681d02874796e70a1ee147f4b8dca6cbb.tar.gz yosys-185bbbe681d02874796e70a1ee147f4b8dca6cbb.tar.bz2 yosys-185bbbe681d02874796e70a1ee147f4b8dca6cbb.zip | |
static cast: support changing size and signedness
Support SystemVerilog Static Cast
- size
- signedness
- (type is not supposted yet)
Fix #535
Diffstat (limited to 'tests/svtypes')
0 files changed, 0 insertions, 0 deletions