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author | Peter Crozier <peter@crozier.com> | 2020-05-08 14:40:49 +0100 |
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committer | Peter Crozier <peter@crozier.com> | 2020-05-08 14:40:49 +0100 |
commit | 0b6b47ca670b9219bcb81ab7d3599267c2ef7571 (patch) | |
tree | 7f185ed9add86d52c5f55828e07b190420c77511 /tests/svtypes | |
parent | aafaeb66dfd839b8223059884d2741dadc9e2d92 (diff) | |
download | yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.tar.gz yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.tar.bz2 yosys-0b6b47ca670b9219bcb81ab7d3599267c2ef7571.zip |
Implement SV structs.
Diffstat (limited to 'tests/svtypes')
-rw-r--r-- | tests/svtypes/struct_simple.sv | 39 | ||||
-rw-r--r-- | tests/svtypes/typedef_struct.sv | 42 |
2 files changed, 81 insertions, 0 deletions
diff --git a/tests/svtypes/struct_simple.sv b/tests/svtypes/struct_simple.sv new file mode 100644 index 000000000..e29489fb7 --- /dev/null +++ b/tests/svtypes/struct_simple.sv @@ -0,0 +1,39 @@ +module top; + localparam BITS=8; + + struct packed { + logic a; + logic[BITS-1:0] b; + byte c; + logic x, y; + } s; + + struct packed signed { + integer a; + logic[15:0] b; + logic[7:0] c; + bit [7:0] d; + } pack1; + + assign s.a = '1; + assign s.b = '1; + assign s.c = 8'hAA; + assign s.x = '1; + logic[7:0] t; + assign t = s.b; + assign pack1.a = 42; + assign pack1.b = 16'hAAAA; + assign pack1.c = '1; + assign pack1.d = 8'h55; + + always_comb assert(s.a == 1'b1); + always_comb assert(s.c == 8'hAA); + always_comb assert(s.x == 1'b1); + always_comb assert(t == 8'hFF); + always_comb assert(pack1.a == 42); + always_comb assert(pack1.b == 16'hAAAA); + always_comb assert(pack1.c == 8'hFF); + always_comb assert(pack1[15:8] == 8'hFF); + always_comb assert(pack1.d == 8'h55); + +endmodule diff --git a/tests/svtypes/typedef_struct.sv b/tests/svtypes/typedef_struct.sv new file mode 100644 index 000000000..7ae007952 --- /dev/null +++ b/tests/svtypes/typedef_struct.sv @@ -0,0 +1,42 @@ +package p; + +typedef struct packed { + byte a; + byte b; +} p_t; + +endpackage + + +module top; + + typedef logic[7:0] t_t; + + typedef struct packed { + bit a; + logic[7:0] b; + t_t t; + } s_t; + + s_t s; + s_t s1; + + p::p_t ps; + + assign s.a = '1; + assign s.b = '1; + assign s.t = 8'h55; + assign s1 = s; + assign ps.a = 8'hAA; + assign ps.b = 8'h55; + + always_comb begin + assert(s.a == 1'b1); + assert(s.b == 8'hFF); + assert(s.t == 8'h55); + assert(s1.t == 8'h55); + assert(ps.a == 8'hAA); + assert(ps.b == 8'h55); + end + +endmodule |