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| author | Clifford Wolf <clifford@clifford.at> | 2018-02-18 16:35:06 +0100 |
|---|---|---|
| committer | Clifford Wolf <clifford@clifford.at> | 2018-02-18 16:35:06 +0100 |
| commit | 5c6247dfa6a5a0b8f1dfbec2810db54deb42deb3 (patch) | |
| tree | e2578bbbc10379964015da67787aaa83daf090df /tests/sva/sva_range.sv | |
| parent | 9d963cd29c499530bc4bcc66f298a6e56142c509 (diff) | |
| download | yosys-5c6247dfa6a5a0b8f1dfbec2810db54deb42deb3.tar.gz yosys-5c6247dfa6a5a0b8f1dfbec2810db54deb42deb3.tar.bz2 yosys-5c6247dfa6a5a0b8f1dfbec2810db54deb42deb3.zip | |
Add support for SVA sequence concatenation ranges via verific
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'tests/sva/sva_range.sv')
| -rw-r--r-- | tests/sva/sva_range.sv | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/tests/sva/sva_range.sv b/tests/sva/sva_range.sv new file mode 100644 index 000000000..38199bff1 --- /dev/null +++ b/tests/sva/sva_range.sv @@ -0,0 +1,19 @@ +module top ( + input clk, + input a, b, c, d +); + default clocking @(posedge clk); endclocking + + assert property ( + a ##[*] b |=> c until ##[*] d + ); + +`ifndef FAIL + assume property ( + b |=> ##5 d + ); + assume property ( + b || (c && !d) |=> c + ); +`endif +endmodule |