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| author | Zachary Snow <zach@zachjs.com> | 2021-12-29 10:38:55 -0700 |
|---|---|---|
| committer | Zachary Snow <zachary.j.snow@gmail.com> | 2022-01-03 12:11:41 -0700 |
| commit | e0e4dfb55ea1812521aa4c0e79240987653538da (patch) | |
| tree | 6c7e53b63f24982661d8ea2ec37c20fbd95c76dc /tests/simple | |
| parent | 207af4196b588546344db80df6cb3f77df784aaf (diff) | |
| download | yosys-e0e4dfb55ea1812521aa4c0e79240987653538da.tar.gz yosys-e0e4dfb55ea1812521aa4c0e79240987653538da.tar.bz2 yosys-e0e4dfb55ea1812521aa4c0e79240987653538da.zip | |
fix iverilog compatibility for new case expr tests
Diffstat (limited to 'tests/simple')
| -rw-r--r-- | tests/simple/case_expr_extend.sv | 2 | ||||
| -rw-r--r-- | tests/simple/case_expr_query.sv | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/tests/simple/case_expr_extend.sv b/tests/simple/case_expr_extend.sv index 61bd14df1..d4ca2aa9b 100644 --- a/tests/simple/case_expr_extend.sv +++ b/tests/simple/case_expr_extend.sv @@ -1,7 +1,7 @@ module top( output logic [5:0] out ); -always_comb begin +initial begin out = '0; case (1'b1 << 1) 2'b10: out = '1; diff --git a/tests/simple/case_expr_query.sv b/tests/simple/case_expr_query.sv index 63a0a8b7a..844dfb713 100644 --- a/tests/simple/case_expr_query.sv +++ b/tests/simple/case_expr_query.sv @@ -1,7 +1,7 @@ module top( output logic [5:0] out ); -always_comb begin +initial begin out = '0; case ($bits (out)) 6: case ($size (out)) 6: |