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author | Clifford Wolf <clifford@clifford.at> | 2019-06-19 12:12:08 +0200 |
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committer | Clifford Wolf <clifford@clifford.at> | 2019-06-19 12:12:08 +0200 |
commit | fa5fc3f6afd9eb27c1f52244b60cbeb77aa2e26c (patch) | |
tree | 50042739afbbb034336f8ed8aac80033a005b127 /tests/simple/defvalue.sv | |
parent | 3da5288ce096befb844476907a2c6020aae62b8b (diff) | |
download | yosys-fa5fc3f6afd9eb27c1f52244b60cbeb77aa2e26c.tar.gz yosys-fa5fc3f6afd9eb27c1f52244b60cbeb77aa2e26c.tar.bz2 yosys-fa5fc3f6afd9eb27c1f52244b60cbeb77aa2e26c.zip |
Add defvalue test, minor autotest fixes for .sv files
Signed-off-by: Clifford Wolf <clifford@clifford.at>
Diffstat (limited to 'tests/simple/defvalue.sv')
-rw-r--r-- | tests/simple/defvalue.sv | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/tests/simple/defvalue.sv b/tests/simple/defvalue.sv new file mode 100644 index 000000000..b0a087ecb --- /dev/null +++ b/tests/simple/defvalue.sv @@ -0,0 +1,22 @@ +module top(input clock, input [3:0] delta, output [3:0] cnt1, cnt2); + cnt #(1) foo (.clock, .cnt(cnt1), .delta); + cnt #(2) bar (.clock, .cnt(cnt2)); +endmodule + +module cnt #( + parameter integer initval = 0 +) ( + input clock, + output logic [3:0] cnt = initval, +`ifdef __ICARUS__ + input [3:0] delta +`else + input [3:0] delta = 10 +`endif +); +`ifdef __ICARUS__ + assign (weak0, weak1) delta = 10; +`endif + always @(posedge clock) + cnt <= cnt + delta; +endmodule |