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authorMarcelina Koƛcielnicka <mwk@0x04.net>2021-05-21 02:27:06 +0200
committerMarcelina Koƛcielnicka <mwk@0x04.net>2021-07-28 23:18:38 +0200
commit8bdc019730c665f678fc1f3bdd8ed96cf2f513d3 (patch)
tree9b8800178f8bd519f8a7c393b32887cfd6a56c28 /tests/opt
parente9effd58d24afc8470813aec3028e932ea677aa5 (diff)
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verilog: Emit $meminit_v2 cell.
Fixes #2447.
Diffstat (limited to 'tests/opt')
-rw-r--r--tests/opt/opt_clean_mem.ys8
1 files changed, 4 insertions, 4 deletions
diff --git a/tests/opt/opt_clean_mem.ys b/tests/opt/opt_clean_mem.ys
index d08943da4..5e85df6c8 100644
--- a/tests/opt/opt_clean_mem.ys
+++ b/tests/opt/opt_clean_mem.ys
@@ -25,24 +25,24 @@ proc
select -assert-count 2 t:$memrd
select -assert-count 1 t:$memwr
-select -assert-count 1 t:$meminit
+select -assert-count 1 t:$meminit_v2
design -save orig
opt_clean
select -assert-none t:$memrd
select -assert-none t:$memwr
-select -assert-none t:$meminit
+select -assert-none t:$meminit_v2
design -load orig
expose top/rd1
opt_clean
select -assert-count 1 t:$memrd
select -assert-count 1 t:$memwr
-select -assert-count 1 t:$meminit
+select -assert-count 1 t:$meminit_v2
design -load orig
expose top/rd1 top/rd2
opt_clean
select -assert-count 2 t:$memrd
select -assert-count 1 t:$memwr
-select -assert-count 1 t:$meminit
+select -assert-count 1 t:$meminit_v2