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authorEddie Hung <eddie@fpgeh.com>2019-08-12 12:06:45 -0700
committerEddie Hung <eddie@fpgeh.com>2019-08-12 12:06:45 -0700
commit12c692f6eda7367527fde2a8aad49447a73aa643 (patch)
tree8680eefff6897b2f4b33d12b5d96a6ea8c549b5b /tests/opt/opt_rmdff_sat.ys
parent78b30bbb1102047585d1a2eac89b1c7f5ca7344e (diff)
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Revert "Merge pull request #1280 from YosysHQ/revert-1266-eddie/ice40_full_adder"
This reverts commit c851dc13108021834533094a8a3236da6d9e0161, reversing changes made to f54bf1631ff37a83733c162e6ebd188c1d5ea18f.
Diffstat (limited to 'tests/opt/opt_rmdff_sat.ys')
-rw-r--r--tests/opt/opt_rmdff_sat.ys5
1 files changed, 5 insertions, 0 deletions
diff --git a/tests/opt/opt_rmdff_sat.ys b/tests/opt/opt_rmdff_sat.ys
new file mode 100644
index 000000000..1c3dd9c05
--- /dev/null
+++ b/tests/opt/opt_rmdff_sat.ys
@@ -0,0 +1,5 @@
+read_verilog opt_rmdff_sat.v
+prep -flatten
+opt_rmdff -sat
+synth
+select -assert-count 5 t:$_DFF_P_