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| author | Marcelina Kościelnicka <mwk@0x04.net> | 2021-05-27 20:54:29 +0200 |
|---|---|---|
| committer | Marcelina Kościelnicka <mwk@0x04.net> | 2021-08-11 13:34:10 +0200 |
| commit | fd7921776387a05edadcc90d1300670d49a73d68 (patch) | |
| tree | 84fb8ab2ff4c012b5dd24e8c3dcd5dace93474fb /tests/opt/opt_mem_feedback.ys | |
| parent | b96eb888cc7518c20532ff688ec24b8b51f88f8e (diff) | |
| download | yosys-fd7921776387a05edadcc90d1300670d49a73d68.tar.gz yosys-fd7921776387a05edadcc90d1300670d49a73d68.tar.bz2 yosys-fd7921776387a05edadcc90d1300670d49a73d68.zip | |
Add v2 memory cells.
Diffstat (limited to 'tests/opt/opt_mem_feedback.ys')
| -rw-r--r-- | tests/opt/opt_mem_feedback.ys | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/tests/opt/opt_mem_feedback.ys b/tests/opt/opt_mem_feedback.ys index 56078ec27..06d6e7e77 100644 --- a/tests/opt/opt_mem_feedback.ys +++ b/tests/opt/opt_mem_feedback.ys @@ -37,7 +37,7 @@ design -save preopt design -load start opt_mem_feedback -select -assert-count 1 t:$memrd +select -assert-count 1 t:$memrd_v2 memory_map design -save postopt @@ -182,7 +182,7 @@ design -save preopt design -load start opt_mem_feedback -select -assert-count 1 t:$memrd +select -assert-count 1 t:$memrd_v2 memory_map design -save postopt |