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| author | whitequark <whitequark@whitequark.org> | 2018-12-06 14:28:20 +0000 |
|---|---|---|
| committer | whitequark <whitequark@whitequark.org> | 2018-12-07 17:20:34 +0000 |
| commit | c38ea9ae65b2a987d6a7ea790abf339944069f9a (patch) | |
| tree | ea0f10b5e8737eaea1d1cfbcce469e6a3bb9ac70 /tests/opt/opt_lut.ys | |
| parent | 1bb728e24fd4e2a2a4025aba43344b1072d92e2e (diff) | |
| download | yosys-c38ea9ae65b2a987d6a7ea790abf339944069f9a.tar.gz yosys-c38ea9ae65b2a987d6a7ea790abf339944069f9a.tar.bz2 yosys-c38ea9ae65b2a987d6a7ea790abf339944069f9a.zip | |
equiv_opt: new command, for verifying optimization passes.
Diffstat (limited to 'tests/opt/opt_lut.ys')
| -rw-r--r-- | tests/opt/opt_lut.ys | 13 |
1 files changed, 1 insertions, 12 deletions
diff --git a/tests/opt/opt_lut.ys b/tests/opt/opt_lut.ys index 86ad93bb3..f3c1e2822 100644 --- a/tests/opt/opt_lut.ys +++ b/tests/opt/opt_lut.ys @@ -1,15 +1,4 @@ read_verilog opt_lut.v synth_ice40 ice40_unlut -design -save preopt - -opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3 -design -stash postopt - -design -copy-from preopt -as preopt top -design -copy-from postopt -as postopt top -equiv_make preopt postopt equiv -techmap -map ice40_carry.v -prep -flatten -top equiv -equiv_induct -equiv_status -assert +equiv_opt -map ice40_carry.v -assert opt_lut -dlogic SB_CARRY:I0=1:I1=2:CI=3 |