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author | whitequark <whitequark@whitequark.org> | 2018-12-05 00:23:22 +0000 |
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committer | whitequark <whitequark@whitequark.org> | 2018-12-05 16:30:37 +0000 |
commit | 9e072ec21f9985126e1cfeb04fa7f2bc963790b3 (patch) | |
tree | 3c5ce9b8c789c460deea4759d69b065726714430 /tests/opt/opt_lut.ys | |
parent | 1719aa88acf9f6d52caa81384bc50237605157e3 (diff) | |
download | yosys-9e072ec21f9985126e1cfeb04fa7f2bc963790b3.tar.gz yosys-9e072ec21f9985126e1cfeb04fa7f2bc963790b3.tar.bz2 yosys-9e072ec21f9985126e1cfeb04fa7f2bc963790b3.zip |
opt_lut: new pass, to combine LUTs for tighter packing.
Diffstat (limited to 'tests/opt/opt_lut.ys')
-rw-r--r-- | tests/opt/opt_lut.ys | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/tests/opt/opt_lut.ys b/tests/opt/opt_lut.ys new file mode 100644 index 000000000..1c7dc1473 --- /dev/null +++ b/tests/opt/opt_lut.ys @@ -0,0 +1,15 @@ +read_verilog opt_lut.v +synth_ice40 +ice40_unlut +design -save preopt + +opt_lut +design -stash postopt + +design -copy-from preopt -as preopt top +design -copy-from postopt -as postopt top +equiv_make preopt postopt equiv +techmap -map ice40_carry.v +prep -flatten -top equiv +equiv_induct +equiv_status -assert |